| /external/llvm/test/CodeGen/AArch64/ |
| divrem.ll | 20 %1 = srem <4 x i32> %x, < i32 20, i32 20, i32 20, i32 20 >
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| /external/llvm/test/CodeGen/SPARC/ |
| rem.ll | 10 %tmp1 = srem i64 %X, %Y
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| /external/llvm/test/CodeGen/X86/ |
| fast-isel-divrem-x86-64.ll | 15 %result = srem i64 %dividend, %divisor
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| mod128.ll | 23 %1 = srem i128 %x, 3
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| pr14088.ll | 7 %rem = srem i32 %zed2, 100
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| combiner-aa-0.ll | 10 %t2 = srem i32 %t0, 32 ; <i32> [#uses=1]
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| critical-edge-split-2.ll | 21 %call1 = phi i16 [ trunc (i32 srem (i32 1, i32 zext (i1 icmp eq (%1* bitcast (i8* getelementptr inbounds (%0, %0* @g_2, i64 0, i32 1, i32 0) to %1*), %1* @g_4) to i32)) to i16), %cond.false.i ], [ 1, %entry ]
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| scalar_widen_div.ll | 124 %rem.r = srem <4 x i8> %num, %rem
137 %rem.r = srem <5 x i16> %num, %rem
149 %rem.r = srem <4 x i32> %num, %rem
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| 2008-09-11-CoalescerBug.ll | 8 %0 = srem i32 1, 0 ; <i32> [#uses=2]
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| /external/llvm/test/Transforms/InstCombine/ |
| 2008-09-02-VectorCrash.ll | 18 %7 = srem <2 x i32> zeroinitializer, zeroinitializer ; <<2 x i32>> [#uses=1]
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| 2008-06-24-StackRestore.ll | 25 %tmp4 = srem i32 %tmp3857, 1000 ; <i32> [#uses=2]
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| 2008-11-20-DivMulRem.ll | 17 ; CHECK-NEXT: srem
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| /external/llvm/test/CodeGen/AMDGPU/ |
| sdivrem24.ll | 137 %result = srem i8 %num, %den
156 %result = srem i16 %num, %den
179 %result = srem i32 %num.i24, %den.i24
198 %result = srem i32 %num.i24, %den.i24
217 %result = srem i32 %num.i24, %den.i24
236 %result = srem i32 %num.i24, %den.i24
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| sdiv.ll | 93 ; %result = srem i64 %a, %b
100 ; %resultrem = srem i64 %a, %b
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| sdivrem64.ll | 182 %result = srem i64 %1, %2
222 %result = srem i64 %1, %2
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| /external/llvm/test/CodeGen/ARM/ |
| div.ll | 49 %tmp1 = srem i32 %a, %b ; <i32> [#uses=1]
80 %tmp1 = srem i64 %a, %b ; <i64> [#uses=1]
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| divmod.ll | 18 %rem = srem i32 %x, %y
61 %4 = srem i32 %cols, %3
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| /external/clang/test/CodeGen/ |
| ext-vector.c | 138 // CHECK: srem <4 x i32>
149 // CHECK: srem <4 x i32>
160 // CHECK: srem <4 x i32>
171 // CHECK: srem <4 x i32>
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| /external/llvm/test/Transforms/IndVarSimplify/ |
| eliminate-rem.ll | 5 ; Indvars should be able to eliminate this srem.
20 %t7 = srem i64 %t6, %arg ; <i64> [#uses=1]
54 %t10 = srem i64 %t9, %arg1 ; <i64> [#uses=1]
57 %t13 = srem i64 %t12, %arg1 ; <i64> [#uses=1]
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| /external/llvm/test/Transforms/SimplifyCFG/ |
| dce-cond-after-folding-terminator.ll | 23 %rem = srem i32 %x, 3
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| /external/llvm/test/Bitcode/ |
| binaryIntInstructions.3.2.ll | 172 define void @srem(i32 %x1){
174 ; CHECK: %res1 = srem i32 %x1, %x1
175 %res1 = srem i32 %x1, %x1
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| /external/llvm/test/Assembler/ |
| ConstantExprFold.ll | 13 global i64* inttoptr (i64 srem (i64 ptrtoint (i64* @A to i64), i64 1) to i64*) ; X % 1 == 0
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| /external/llvm/test/CodeGen/Thumb2/ |
| div.ll | 46 %tmp1 = srem i32 %a, %b ; <i32> [#uses=1]
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| /external/clang/test/OpenMP/ |
| atomic_codegen.cpp | 41 // CHECK: [[NEW_VAL:%.+]] = srem i32 [[OLD_PHI_VAL]], [[B_VAL]]
61 // CHECK: [[NEW_CALC_VAL:%.+]] = srem i32 [[OLD_PHI_VAL]], [[B_VAL]]
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| /external/llvm/lib/Target/ARM/ |
| ARMTargetTransformInfo.cpp | 404 { ISD::SREM, MVT::v1i64, 1 * FunctionCallDivCost},
408 { ISD::SREM, MVT::v2i32, 2 * FunctionCallDivCost},
412 { ISD::SREM, MVT::v4i16, 4 * FunctionCallDivCost},
416 { ISD::SREM, MVT::v8i8, 8 * FunctionCallDivCost},
421 { ISD::SREM, MVT::v2i64, 2 * FunctionCallDivCost},
425 { ISD::SREM, MVT::v4i32, 4 * FunctionCallDivCost},
429 { ISD::SREM, MVT::v8i16, 8 * FunctionCallDivCost},
433 { ISD::SREM, MVT::v16i8, 16 * FunctionCallDivCost},
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