/external/llvm/test/CodeGen/X86/ |
2008-02-27-DeadSlotElimBug.ll | 29 %tmp49 = srem i32 %tmp48, 3 ; <i32> [#uses=1] 33 %tmp55 = srem i32 %i, 3 ; <i32> [#uses=1]
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machine-cp.ll | 19 %rem = srem i32 %a.addr.03, %b.addr.02 52 %rem = srem i64 %a.addr.03, %b.addr.02
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2008-04-17-CoalescerBug.ll | 98 %tmp245.i8588 = srem i64 0, 86400000 ; <i64> [#uses=1] 104 %tmp273.i8594 = srem i32 %tmp268269.i8593, 1000 ; <i32> [#uses=1] 114 %tmp477.i8669 = srem i32 %timeOnly50.0.i8622, 1000 ; <i32> [#uses=1]
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2012-09-28-CGPBug.ll | 23 %7 = srem i32 %6, 2
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MachineSink-CritEdge.ll | 24 %rem = srem i32 %x, 7
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/external/llvm/lib/Transforms/Utils/ |
IntegerDivision.cpp | 30 /// should be pointing where the caller wants code generated, e.g. at the srem 57 // ; %srem = sub i32 %xored, %dividend_sgn 66 Value *SRem = Builder.CreateSub(Xored, DividendSign); 71 return SRem; 377 assert((Rem->getOpcode() == Instruction::SRem || 393 if (Rem->getOpcode() == Instruction::SRem) { 490 assert((Rem->getOpcode() == Instruction::SRem || 516 if (Rem->getOpcode() == Instruction::SRem) { 540 assert((Rem->getOpcode() == Instruction::SRem || 566 if (Rem->getOpcode() == Instruction::SRem) { [all...] |
BypassSlowDivision.cpp | 234 bool UseRemOp = Opcode == Instruction::SRem || Opcode == Instruction::URem; 236 Opcode == Instruction::SRem;
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/external/llvm/unittests/Transforms/Utils/ |
IntegerDivision.cpp | 83 TEST(IntegerDivision, SRem) { 102 EXPECT_TRUE(BB->front().getOpcode() == Instruction::SRem); 223 EXPECT_TRUE(BB->front().getOpcode() == Instruction::SRem);
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/external/llvm/bindings/python/llvm/ |
enumerations.py | 79 ('SRem', 18),
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/external/llvm/test/Analysis/Lint/ |
check-zero-divide.ll | 9 %b = srem <2 x i32> %a, <i32 5, i32 8>
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/external/llvm/test/CodeGen/ARM/ |
thumb2-size-reduction-internal-flags.ll | 21 %rem2 = srem i32 %sub, 31 60 %rem17 = srem i32 %call16, 1000 96 %rem56 = srem i32 %call55, 1000 141 %rem90 = srem i32 %call89, 10000
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/external/llvm/test/CodeGen/Mips/Fast-ISel/ |
rem1.ll | 30 %rem = srem i32 %1, %2
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/external/llvm/test/CodeGen/Mips/ |
divrem.ll | 80 %rem = srem i32 %a0, %a1 172 %rem = srem i32 %a0, %a1 271 %rem = srem i64 %a0, %a1 349 %rem = srem i64 %a0, %a1
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mips64muldiv.ll | 77 %rem = srem i64 %a0, %a1
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/external/llvm/test/Transforms/InstCombine/ |
2007-10-28-stacksave.ll | 15 %tmp4 = srem i32 %n.0, 47 ; <i32> [#uses=1]
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exact.ll | 18 ; CHECK: %y = srem i32 %x, 3 36 ; CHECK: %y = srem i32 %x, 3
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/external/llvm/test/Transforms/JumpThreading/ |
indirectbr.ll | 23 %rem = srem i32 %i, 2
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/external/llvm/test/Transforms/PGOProfile/ |
landingpad.ll | 16 %rem = srem i32 %i, 3 45 %rem = srem i32 %i, 2
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/external/llvm/test/CodeGen/NVPTX/ |
arithmetic-int.ll | 49 %ret = srem i64 %a, %b 146 %ret = srem i32 %a, %b 239 %ret = srem i16 %a, %b
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/external/llvm/test/CodeGen/Mips/msa/ |
llvm-stress-s1704963983.ll | 73 %B37 = srem <1 x i16> %I29, zeroinitializer 105 %B59 = srem i32 %E19, %E19
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llvm-stress-s2704903805.ll | 96 %B51 = srem <1 x i8> %I, %Shuff22 131 %B73 = srem i64 %E62, %Se
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/external/llvm/test/Transforms/SampleProfile/ |
fnptr.ll | 82 %rem = srem i32 %call, 100, !dbg !15 86 %rem6 = srem i32 %call5, 100, !dbg !16
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/external/llvm/unittests/ADT/ |
APIntTest.cpp | 193 EXPECT_EQ(zero, neg_one.srem(one)); 195 EXPECT_EQ(zero, one.srem(neg_one)); 206 EXPECT_EQ(nine.srem(two), one); 207 EXPECT_EQ(nine.srem(-two), one); 208 EXPECT_EQ((-nine).srem(two), -one); 209 EXPECT_EQ((-nine).srem(-two), -one); 407 r = p.srem(a); 423 r = p.srem(b); [all...] |
/external/llvm/test/CodeGen/AArch64/ |
arm64-neon-mul-div.ll | 334 %tmp3 = srem <1 x i8> %A, %B; 356 %tmp3 = srem <8 x i8> %A, %B; 394 %tmp3 = srem <16 x i8> %A, %B; 402 %tmp3 = srem <1 x i16> %A, %B; 416 %tmp3 = srem <4 x i16> %A, %B; 438 %tmp3 = srem <8 x i16> %A, %B; 446 %tmp3 = srem <1 x i32> %A, %B; 456 %tmp3 = srem <2 x i32> %A, %B; 470 %tmp3 = srem <4 x i32> %A, %B; 478 %tmp3 = srem <1 x i64> %A, %B [all...] |
/external/llvm/include/llvm/IR/ |
Instruction.def | 134 HANDLE_BINARY_INST(21, SRem , BinaryOperator)
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