| /art/compiler/optimizing/ |
| code_generator_mips.cc | 87 size_t stack_offset = calling_convention.GetStackOffsetOf(stack_index_); local
88 next_location = Location::StackSlot(stack_offset);
106 size_t stack_offset = calling_convention.GetStackOffsetOf(stack_index_); local
107 next_location = Location::DoubleStackSlot(stack_offset);
122 size_t stack_offset = calling_convention.GetStackOffsetOf(stack_index_); local
123 next_location = Primitive::Is64BitType(type) ? Location::DoubleStackSlot(stack_offset)
124 : Location::StackSlot(stack_offset);
648 int stack_offset = ensure_scratch.IsSpilled() ? kMipsWordSize : 0; local
649 for (int i = 0; i <= (double_slot ? 1 : 0); i++, stack_offset += kMipsWordSize) {
653 index1 + stack_offset);
[all...] |
| code_generator_arm64.cc | 186 size_t stack_offset = codegen->GetFirstRegisterSlotInSlowPath(); local
191 locations->SetStackBit(stack_offset / kVRegSize);
193 DCHECK_LT(stack_offset, codegen->GetFrameSize() - codegen->FrameEntrySpillSize());
195 saved_core_stack_offsets_[i] = stack_offset;
196 stack_offset += kXRegSizeInBytes;
203 DCHECK_LT(stack_offset, codegen->GetFrameSize() - codegen->FrameEntrySpillSize());
205 saved_fpu_stack_offsets_[i] = stack_offset;
206 stack_offset += kDRegSizeInBytes;
876 size_t stack_offset = calling_convention.GetStackOffsetOf(stack_index_); local
[all...] |
| code_generator_mips64.cc | 85 size_t stack_offset = calling_convention.GetStackOffsetOf(stack_index_); local
86 next_location = Primitive::Is64BitType(type) ? Location::DoubleStackSlot(stack_offset)
87 : Location::StackSlot(stack_offset);
494 int stack_offset = ensure_scratch.IsSpilled() ? kMips64DoublewordSize : 0; local
498 index1 + stack_offset);
502 index2 + stack_offset);
506 index2 + stack_offset);
507 __ StoreToOffset(store_type, TMP, SP, index1 + stack_offset);
[all...] |
| code_generator_x86_64.cc | 5221 int stack_offset = ensure_scratch.IsSpilled() ? kX86_64WordSize : 0; local
5222 __ movl(CpuRegister(TMP), Address(CpuRegister(RSP), mem1 + stack_offset)); local
5224 Address(CpuRegister(RSP), mem2 + stack_offset)); local
5225 __ movl(Address(CpuRegister(RSP), mem2 + stack_offset), CpuRegister(TMP)); local
5226 __ movl(Address(CpuRegister(RSP), mem1 + stack_offset), local
5246 int stack_offset = ensure_scratch.IsSpilled() ? kX86_64WordSize : 0; local
5247 __ movq(CpuRegister(TMP), Address(CpuRegister(RSP), mem1 + stack_offset)); local
5249 Address(CpuRegister(RSP), mem2 + stack_offset)); local
5250 __ movq(Address(CpuRegister(RSP), mem2 + stack_offset), CpuRegister(TMP)); local
5251 __ movq(Address(CpuRegister(RSP), mem1 + stack_offset), local
[all...] |
| code_generator_arm.cc | 4988 int stack_offset = ensure_scratch.IsSpilled() ? kArmWordSize : 0; local
6314 int stack_offset = slow_path->GetStackOffsetOfCoreRegister(location.AsRegister<Register>()); local
[all...] |
| /external/mesa3d/src/gallium/auxiliary/rtasm/ |
| rtasm_x86sse.h | 56 unsigned stack_offset:16; member in struct:x86_function
|
| /external/bison/ |
| ChangeLog-1998 | 9 * src/reader.c (stack_offset;): Change some warni to warns.
[all...] |
