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  /external/llvm/test/CodeGen/PowerPC/
2006-04-05-splat-ish.ll 6 %tmp1 = add <8 x i16> %tmp, < i16 10, i16 10, i16 10, i16 10, i16 10, i16 10, i16 10, i16 10 > ; <<8 x i16>> [#uses=1]
7 store <8 x i16> %tmp1, <8 x i16>* %P
2006-10-13-Miscompile.ll 5 %tmp1 = and i64 %X, 3 ; <i64> [#uses=1]
6 %tmp = icmp sgt i64 %tmp1, 2 ; <i1> [#uses=1]
ppc64le-localentry.ll 20 ; CHECK-NEXT: .Ltmp[[TMP1:[0-9]+]]:
21 ; CHECK-NEXT: addis 2, 12, .TOC.-.Ltmp[[TMP1]]@ha
22 ; CHECK-NEXT: addi 2, 2, .TOC.-.Ltmp[[TMP1]]@l
24 ; CHECK-NEXT: .localentry use_toc, .Ltmp[[TMP2]]-.Ltmp[[TMP1]]
37 ; CHECK-NEXT: .Ltmp[[TMP1:[0-9]+]]:
38 ; CHECK-NEXT: addis 2, 12, .TOC.-.Ltmp[[TMP1]]@ha
39 ; CHECK-NEXT: addi 2, 2, .TOC.-.Ltmp[[TMP1]]@l
41 ; CHECK-NEXT: .localentry use_toc_implicit, .Ltmp[[TMP2]]-.Ltmp[[TMP1]]
reg-coalesce-simple.ll 6 %tmp1 = getelementptr %struct.foo, %struct.foo* %X, i32 0, i32 2, i32 100 ; <i8*> [#uses=1]
7 %tmp = load i8, i8* %tmp1 ; <i8> [#uses=1]
  /external/llvm/test/CodeGen/Thumb/
2007-01-31-RegInfoAssert.ll 8 %tmp1 = bitcast %struct.rtx_def* %D to i32*
9 %tmp7 = load i32, i32* %tmp1
2012-04-26-M0ISelBug.ll 10 %tmp1 = xor i32 %tmp0, %a
11 ret i32 %tmp1
  /external/llvm/test/CodeGen/Thumb2/
div.ll 22 %tmp1 = sdiv i32 %a, %b ; <i32> [#uses=1]
23 ret i32 %tmp1
34 %tmp1 = udiv i32 %a, %b ; <i32> [#uses=1]
35 ret i32 %tmp1
46 %tmp1 = srem i32 %a, %b ; <i32> [#uses=1]
47 ret i32 %tmp1
58 %tmp1 = urem i32 %a, %b ; <i32> [#uses=1]
59 ret i32 %tmp1
thumb2-eor.ll 28 %tmp1 = xor i32 %a, %tmp
29 ret i32 %tmp1
36 %tmp1 = xor i32 %tmp, %a
37 ret i32 %tmp1
44 %tmp1 = xor i32 %a, %tmp
45 ret i32 %tmp1
54 %tmp1 = xor i32 %tmp, %a
55 ret i32 %tmp1
thumb2-ldr.ll 34 %tmp1 = sub i32 %base, 128
35 %tmp2 = inttoptr i32 %tmp1 to i32*
44 %tmp1 = add i32 %base, %offset
45 %tmp2 = inttoptr i32 %tmp1 to i32*
54 %tmp1 = shl i32 %offset, 2
55 %tmp2 = add i32 %base, %tmp1
67 %tmp1 = lshr i32 %offset, 2
68 %tmp2 = add i32 %base, %tmp1
thumb2-ldrh.ll 34 %tmp1 = sub i32 %base, 128
35 %tmp2 = inttoptr i32 %tmp1 to i16*
44 %tmp1 = add i32 %base, %offset
45 %tmp2 = inttoptr i32 %tmp1 to i16*
54 %tmp1 = shl i32 %offset, 2
55 %tmp2 = add i32 %base, %tmp1
66 %tmp1 = lshr i32 %offset, 2
67 %tmp2 = add i32 %base, %tmp1
thumb2-str.ll 39 %tmp1 = sub i32 %base, 128
40 %tmp2 = inttoptr i32 %tmp1 to i32*
49 %tmp1 = add i32 %base, %offset
50 %tmp2 = inttoptr i32 %tmp1 to i32*
59 %tmp1 = shl i32 %offset, 2
60 %tmp2 = add i32 %base, %tmp1
71 %tmp1 = lshr i32 %offset, 2
72 %tmp2 = add i32 %base, %tmp1
thumb2-strb.ll 39 %tmp1 = sub i32 %base, 128
40 %tmp2 = inttoptr i32 %tmp1 to i8*
49 %tmp1 = add i32 %base, %offset
50 %tmp2 = inttoptr i32 %tmp1 to i8*
59 %tmp1 = shl i32 %offset, 2
60 %tmp2 = add i32 %base, %tmp1
71 %tmp1 = lshr i32 %offset, 2
72 %tmp2 = add i32 %base, %tmp1
thumb2-strh.ll 39 %tmp1 = sub i32 %base, 128
40 %tmp2 = inttoptr i32 %tmp1 to i16*
49 %tmp1 = add i32 %base, %offset
50 %tmp2 = inttoptr i32 %tmp1 to i16*
59 %tmp1 = shl i32 %offset, 2
60 %tmp2 = add i32 %base, %tmp1
71 %tmp1 = lshr i32 %offset, 2
72 %tmp2 = add i32 %base, %tmp1
tls1.ll 13 %tmp1 = load i32, i32* @i ; <i32> [#uses=1]
14 ret i32 %tmp1
  /external/llvm/test/CodeGen/X86/
2008-06-25-VecISelBug.ll 5 %tmp1 = shufflevector <4 x float> zeroinitializer, <4 x float> < float 0.000000e+00, float 1.000000e+00, float 0.000000e+00, float 1.000000e+00 >, <4 x i32> < i32 0, i32 1, i32 4, i32 5 >
6 %tmp2 = insertelement <4 x float> %tmp1, float 1.000000e+00, i32 3
longlong-deadload.ll 9 %tmp1 = load i64, i64* %P, align 8 ; <i64> [#uses=1]
10 %tmp2 = xor i64 %tmp1, 1 ; <i64> [#uses=1]
nobt.ll 8 %tmp1 = and i32 %x, 1
9 %tmp2 = urem i32 %tmp1, 15
24 %tmp1 = and i32 %x, 1
25 %tmp2 = urem i32 %tmp1, 15
40 %tmp1 = and i32 %x, 1
41 %tmp2 = urem i32 %tmp1, 15
56 %tmp1 = and i32 %x, 1
57 %tmp2 = urem i32 %tmp1, 15
pr2182.ll 19 %tmp1 = add i32 %tmp, 3 ; <i32> [#uses=1]
20 store volatile i32 %tmp1, i32* @x, align 4
22 %tmp1.1 = add i32 %tmp.1, 3 ; <i32> [#uses=1]
23 store volatile i32 %tmp1.1, i32* @x, align 4
25 %tmp1.2 = add i32 %tmp.2, 3 ; <i32> [#uses=1]
26 store volatile i32 %tmp1.2, i32* @x, align 4
28 %tmp1.3 = add i32 %tmp.3, 3 ; <i32> [#uses=1]
29 store volatile i32 %tmp1.3, i32* @x, align 4
scalar-extract.ll 9 %tmp1 = load <2 x i16>, <2 x i16>* %A ; <<2 x i16>> [#uses=1]
10 store <2 x i16> %tmp1, <2 x i16>* %B
  /external/llvm/test/Transforms/InstCombine/
2007-09-10-AliasConstFold.ll 12 %tmp1 = load i8*, i8** @__gthread_active_ptr.5335, align 4 ; <i8*> [#uses=1]
13 %tmp2 = icmp ne i8* %tmp1, null ; <i1> [#uses=1]
2008-06-19-UncondLoad.ll 7 %tmp1 = load i32, i32* %a
9 %add = add i32 %tmp1, %tmp3
fpextend.ll 9 %tmp1 = fpext float %tmp to double ; <double> [#uses=1]
10 %tmp3 = fadd double %tmp1, 0.000000e+00 ; <double> [#uses=1]
19 %tmp1 = fpext float %tmp to double ; <double> [#uses=1]
22 %tmp5 = fmul double %tmp1, %tmp23 ; <double> [#uses=1]
31 %tmp1 = fpext float %tmp to double ; <double> [#uses=1]
34 %tmp5 = fdiv double %tmp1, %tmp23 ; <double> [#uses=1]
43 %tmp1 = fpext float %tmp to double ; <double> [#uses=1]
44 %tmp2 = fsub double -0.000000e+00, %tmp1 ; <double> [#uses=1]
  /external/llvm/test/Transforms/SCCP/
2009-01-14-IPSCCP-Invoke.ll 6 %tmp1 = invoke i32 @f()
15 ret i32 %tmp1
  /frameworks/av/media/libstagefright/codecs/on2/h264dec/source/arm11_asm/
h264bsd_interpolate_chroma_ver.s 53 tmp1 RN 7 label
96 ADD tmp1, x0, chrPW ;// tmp1 = x0+ chromaPartWidth
97 CMP tmp1, width ;// x0+chromaPartWidth > width
104 ADD tmp1, y0, chrPH ;// tmp1 = y0 + chromaPartHeight
105 ADD tmp1, tmp1, #1 ;// tmp1 = y0 + chromaPartHeight + 1
106 CMP tmp1, heigh
    [all...]
  /external/llvm/test/CodeGen/ARM/
vceq.ll 6 %tmp1 = load <8 x i8>, <8 x i8>* %A
8 %tmp3 = icmp eq <8 x i8> %tmp1, %tmp2
16 %tmp1 = load <4 x i16>, <4 x i16>* %A
18 %tmp3 = icmp eq <4 x i16> %tmp1, %tmp2
26 %tmp1 = load <2 x i32>, <2 x i32>* %A
28 %tmp3 = icmp eq <2 x i32> %tmp1, %tmp2
36 %tmp1 = load <2 x float>, <2 x float>* %A
38 %tmp3 = fcmp oeq <2 x float> %tmp1, %tmp2
46 %tmp1 = load <16 x i8>, <16 x i8>* %A
48 %tmp3 = icmp eq <16 x i8> %tmp1, %tmp
    [all...]

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