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  /toolchain/binutils/binutils-2.25/gas/testsuite/gas/score/
ls32ls16p.d 18 10: c0a28080 lw r5, \[r2, 128\]
19 14: c0a28080 lw r5, \[r2, 128\]
30 30: c4a28040 lh r5, \[r2, 64\]
31 34: c4a28040 lh r5, \[r2, 64\]
42 50: d8a28020 lbu r5, \[r2, 32\]
43 54: d8a28020 lbu r5, \[r2, 32\]
54 70: d0a28080 sw r5, \[r2, 128\]
55 74: d0a28080 sw r5, \[r2, 128\]
66 90: d4a28040 sh r5, \[r2, 64\]
67 94: d4a28040 sh r5, \[r2, 64\
    [all...]
  /toolchain/binutils/binutils-2.25/ld/testsuite/ld-nios2/
relax_cjmp.d 12 00000000 <[^>]*> bge r2,r3,00008000 <[^>]*>
13 00000004 <[^>]*> bge r2,r3,00000014 <[^>]*>
17 00000014 <[^>]*> bge r3,r2,00000020 <sym>
23 00008000 <[^>]*> beq r2,r3,00010000 <on_border>
24 00008004 <[^>]*> bne r2,r3,00008014 <[^>]*>
31 00010000 <on_border> bne r2,r3,00010018 <in_range>
  /toolchain/binutils/binutils-2.25/ld/testsuite/ld-powerpc/
tlsso.d 12 .* (f8 41 00 28|28 00 41 f8) std r2,40\(r1\)
13 .* (e9 82 80 78|78 80 82 e9) ld r12,-32648\(r2\)
15 .* (e8 42 80 80|80 80 42 e8) ld r2,-32640\(r2\)
16 .* (28 22 00 00|00 00 22 28) cmpldi r2,0
21 .* (38 62 80 20|20 80 62 38) addi r3,r2,-32736
23 .* (e8 41 00 28|28 00 41 e8) ld r2,40\(r1\)
24 .* (38 62 80 50|50 80 62 38) addi r3,r2,-32688
26 .* (e8 41 00 28|28 00 41 e8) ld r2,40\(r1\)
27 .* (38 62 80 38|38 80 62 38) addi r3,r2,-3271
    [all...]
  /external/valgrind/none/tests/arm/
v6media.stdout.exp 2 mul r0, r1, r2 :: rd 0x00000000 rm 0x00000000, rn 0x00000000, carryin 0, cpsr 0x00000000 ge[3:0]=0000
3 mul r0, r1, r2 :: rd 0x00000000 rm 0xffffffff, rn 0x00000000, carryin 0, cpsr 0x00000000 ge[3:0]=0000
4 mul r0, r1, r2 :: rd 0x00000000 rm 0x00000000, rn 0xffffffff, carryin 0, cpsr 0x00000000 ge[3:0]=0000
5 mul r0, r1, r2 :: rd 0x00000001 rm 0xffffffff, rn 0xffffffff, carryin 0, cpsr 0x00000000 ge[3:0]=0000
6 mul r0, r1, r2 :: rd 0x00000001 rm 0x7fffffff, rn 0x7fffffff, carryin 0, cpsr 0x00000000 ge[3:0]=0000
7 mul r0, r1, r2 :: rd 0xfffe0001 rm 0x0000ffff, rn 0x0000ffff, carryin 0, cpsr 0x00000000 ge[3:0]=0000
9 mla r0, r1, r2, r3 :: rd 0x00000001 rm 0x00000000, rn 0x00000000 rs 0x00000001, carryin 0, cpsr 0x00000000 ge[3:0]=0000
10 mla r0, r1, r2, r3 :: rd 0x00000001 rm 0xffffffff, rn 0x00000000 rs 0x00000001, carryin 0, cpsr 0x00000000 ge[3:0]=0000
11 mla r0, r1, r2, r3 :: rd 0x00000001 rm 0x00000000, rn 0xffffffff rs 0x00000001, carryin 0, cpsr 0x00000000 ge[3:0]=0000
12 mla r0, r1, r2, r3 :: rd 0x00000002 rm 0xffffffff, rn 0xffffffff rs 0x00000001, carryin 0, cpsr 0x00000000 (…)
    [all...]
  /bionic/libc/arch-arm/denver/bionic/
memcpy_base.S 38 cmp r2, #0
47 cmp r2, #32
50 cmp r2, #128
59 sub r2, r2, r3
92 subs r2, r2, #128
102 cmp r2, #32768
107 subs r2, r2, #12
    [all...]
  /bionic/libc/arch-arm/cortex-a15/bionic/
memcpy_base.S 68 cmp r2, #16
73 //cmp r2, #832
87 sub r2, r2, r3
110 subs r2, r2, #64
117 subs r2, r2, #64
123 adds r2, r2, #3
    [all...]
  /external/libvpx/libvpx/vp8/common/arm/armv6/
copymem16x16_v6.asm 45 strb r4, [r2]
46 strb r5, [r2, #1]
47 strb r6, [r2, #2]
48 strb r7, [r2, #3]
57 strb r4, [r2, #4]
58 strb r5, [r2, #5]
59 strb r6, [r2, #6]
60 strb r7, [r2, #7]
67 strb r4, [r2, #8]
68 strb r5, [r2, #9
    [all...]
  /external/llvm/test/MC/ARM/
thumb-diagnostics.s 13 add r1, r2, r3
15 @ CHECK-ERRORS: add r1, r2, r3
19 add r2, r3
20 mov r2, r3
22 @ CHECK-ERRORS: add r2, r3
25 @ CHECK-ERRORS-V5: mov r2, r3
30 asrs r2, r3, #33
32 @ CHECK-ERRORS: asrs r2, r3, #33
59 ldm r2!, {r5, r8}
60 ldm r2, {r5, r7
    [all...]
arm_addrmode3.s 3 @ CHECK: ldrsbt r1, [r0], r2 @ encoding: [0xd2,0x10,0xb0,0xe0]
5 @ CHECK: ldrsht r1, [r0], r2 @ encoding: [0xf2,0x10,0xb0,0xe0]
7 @ CHECK: ldrht r1, [r0], r2 @ encoding: [0xb2,0x10,0xb0,0xe0]
9 @ CHECK: strht r1, [r0], r2 @ encoding: [0xb2,0x10,0xa0,0xe0]
11 ldrsbt r1, [r0], r2
13 ldrsht r1, [r0], r2
15 ldrht r1, [r0], r2
17 strht r1, [r0], r2
  /hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vp8/common/arm/armv6/
copymem16x16_v6.asm 45 strb r4, [r2]
46 strb r5, [r2, #1]
47 strb r6, [r2, #2]
48 strb r7, [r2, #3]
57 strb r4, [r2, #4]
58 strb r5, [r2, #5]
59 strb r6, [r2, #6]
60 strb r7, [r2, #7]
67 strb r4, [r2, #8]
68 strb r5, [r2, #9
    [all...]
  /external/boringssl/src/crypto/chacha/
chacha_vec_arm.S 68 mov r10, r2
80 str r2, [r7, #8]
81 ldmia r4, {r0, r1, r2, r3}
90 stmia r4, {r0, r1, r2, r3}
95 ldr r2, [r6, #8] @ unaligned
98 stmia lr!, {r0, r1, r2}
101 ldr r2, [r9, #8] @ unaligned
106 stmia ip!, {r0, r1, r2, r3}
108 ldr r2, [r7, #88]
111 vldr d26, [r2, #80
    [all...]
  /art/runtime/arch/arm/
jni_entrypoints_arm.S 24 push {r0, r1, r2, r3, lr} @ spill regs
28 .cfi_rel_offset r2, 8
38 pop {r0, r1, r2, r3, lr} @ restore regs
42 .cfi_restore r2
47 pop {r0, r1, r2, r3, pc} @ restore regs and return to caller to handle exception
  /art/runtime/interpreter/mterp/arm/
op_aget_wide.S 9 and r2, r0, #255 @ r2<- BB
11 GET_VREG r0, r2 @ r0<- vBB (array object)
13 CLEAR_SHADOW_PAIR r9, r2, r3 @ Zero out the shadow regs
21 ldrd r2, [r0, #MIRROR_WIDE_ARRAY_DATA_OFFSET] @ r2/r3<- vBB[vCC]
24 stmia r9, {r2-r3} @ vAA/vAA+1<- r2/r3
  /art/runtime/interpreter/mterp/arm64/
binopWide.S 1 %default {"preinstr":"", "instr":"add x0, x1, x2", "result":"x0", "r1":"x1", "r2":"x2", "chkzero":"0"}
19 GET_VREG_WIDE $r2, w2 // w2<- vCC
22 cbz $r2, common_errDivideByZero // is second operand zero?
  /bionic/libc/arch-arm/cortex-a9/bionic/
__strcpy_chk.S 46 mov lr, r2
54 ldmia r0!, {r2, r3}
58 sub ip, r2, #0x01010101
59 bic ip, ip, r2
72 lsls r2, ip, #17
96 lsls r2, ip, #17
123 ldrb r2, [r0], #1
124 cbz r2, .L_done
129 ldrb r2, [r0], #1
130 cbz r2, .L_don
    [all...]
  /external/clang/test/Misc/
verify.c 11 struct s r2; // expected-error-re {{tentative definition has type '{{.*[[:space:]]*.*}}' that is never completed}} variable in typeref:struct:s
  /external/valgrind/none/tests/s390x/
bfp-3.c 10 __asm__ volatile("maebr %[r1],%[r3],%[r2]"
11 : [r1]"+f"(r1) : [r2]"f"(v2), [r3]"f"(v3));
19 __asm__ volatile("madbr %[r1],%[r3],%[r2]"
20 : [r1]"+f"(r1) : [r2]"f"(v2), [r3]"f"(v3));
28 __asm__ volatile("msebr %[r1],%[r3],%[r2]"
29 : [r1]"+f"(r1) : [r2]"f"(v2), [r3]"f"(v3));
37 __asm__ volatile("msdbr %[r1],%[r3],%[r2]"
38 : [r1]"+f"(r1) : [r2]"f"(v2), [r3]"f"(v3));
  /external/valgrind/none/tests/x86/
incdec_alt.c 7 int r1,r2,r3,r4,r5,r6,r7,r8,a1,a2; variable
23 "\tpopl " VG_SYM(r2) "\n"
58 r1=r2=r3=r4=r5=r6=r7=r8=0;
61 printf("0x%08x\n",r2);
  /frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm_neon/vc/m4p10/src_gcc/
armVCM4P10_InterpolateLuma_Copy_unsafe_s.S 42 STR r4,[r2],r3
44 STR r5,[r2],r3
46 STR r8,[r2],r3
47 STR r9,[r2],r3
56 STR r4,[r2],r3
61 STR r8,[r2],r3
66 STR r4,[r2],r3
69 STR r8,[r2],r3
78 STR r4,[r2],r3
81 STR r8,[r2],r
    [all...]
  /toolchain/binutils/binutils-2.25/gas/testsuite/gas/arm/
arm3.s 5 swpb r3, r3, [r2]
arm7dm.s 4 smull r0, r1, r2, r3
5 umull r0, r1, r2, r3
6 smlal r0, r1, r2, r3
11 umlaleqs r2, r9, r4, r9
neon-cond.s 12 vmovcs r1,r2,d3
13 vmovcc d4,r1,r2
  /toolchain/binutils/binutils-2.25/gas/testsuite/gas/cris/
rd-v32-b3.s 7 moveq 8,r2
sep-err-2.s 6 moveq 0,r2|nop ; { dg-error "(Illegal|Invalid) operands" }
sep-err-3.s 6 moveq 0,r2#nop ; { dg-error "(Illegal|Invalid) operands" }

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