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Searched
refs:NumOperands
(Results
26 - 46
of
46
) sorted by null
1
2
/external/llvm/utils/TableGen/
CodeGenTarget.cpp
397
NumOperands
= R->getValueAsInt("
NumOperands
");
CodeGenDAGPatterns.cpp
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...]
/frameworks/compile/slang/BitWriter_2_9/
BitcodeWriter.cpp
[
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...]
/frameworks/compile/slang/BitWriter_2_9_func/
BitcodeWriter.cpp
[
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...]
/frameworks/compile/slang/BitWriter_3_2/
BitcodeWriter.cpp
[
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...]
/external/clang/lib/Serialization/
ASTReaderStmt.cpp
367
unsigned
NumOperands
= S->NumOutputs + S->NumInputs;
371
Exprs.reserve(
NumOperands
);
372
ConstraintsData.reserve(
NumOperands
);
373
Constraints.reserve(
NumOperands
);
374
for (unsigned i = 0; i !=
NumOperands
; ++i) {
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...]
/external/llvm/lib/Target/X86/
X86MCInstLower.cpp
[
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...]
X86ISelLowering.cpp
[
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...]
/external/llvm/lib/Bitcode/Writer/
BitcodeWriter.cpp
[
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...]
/external/llvm/lib/IR/
Instructions.cpp
234
"
NumOperands
not set up?");
260
assert(getNumOperands() == 1 && "
NumOperands
not set up?");
551
"
NumOperands
not set up?");
[
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...]
Verifier.cpp
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...]
/external/llvm/lib/Target/Hexagon/
HexagonInstrInfo.cpp
[
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...]
/external/llvm/lib/Target/Mips/
MipsSEInstrInfo.cpp
518
assert(Desc.
NumOperands
== 2 && "Unary instruction expected.");
/external/llvm/lib/Target/ARM/
ARMLoadStoreOptimizer.cpp
177
unsigned
NumOperands
= MI->getDesc().getNumOperands();
178
unsigned OffField = MI->getOperand(
NumOperands
-3).getImm();
[
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...]
/external/llvm/lib/Analysis/
InstructionSimplify.cpp
[
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...]
ScalarEvolution.cpp
[
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...]
/external/llvm/lib/CodeGen/SelectionDAG/
LegalizeIntegerTypes.cpp
[
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...]
SelectionDAG.cpp
[
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...]
/external/llvm/lib/Target/ARM/Disassembler/
ARMDisassembler.cpp
571
unsigned short NumOps = ARMInsts[MI.getOpcode()].
NumOperands
;
636
unsigned short NumOps = ARMInsts[MI.getOpcode()].
NumOperands
;
674
unsigned short NumOps = ARMInsts[MI.getOpcode()].
NumOperands
;
[
all
...]
/external/llvm/lib/Target/NVPTX/
NVPTXISelLowering.cpp
[
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...]
/external/llvm/lib/Target/ARM/AsmParser/
ARMAsmParser.cpp
[
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...]
Completed in 1037 milliseconds
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