| /external/llvm/lib/Target/ARM/MCTargetDesc/ |
| ARMUnwindOpAsm.h | 10 // This file declares the unwind opcode assmebler for ARM exception handling
38 /// Reset the unwind opcode assembler.
69 /// Finalize the unwind opcode sequence for EmitBytes()
74 void EmitInt8(unsigned Opcode) {
75 Ops.push_back(Opcode & 0xff);
79 void EmitInt16(unsigned Opcode) {
80 Ops.push_back((Opcode >> 8) & 0xff);
81 Ops.push_back(Opcode & 0xff);
85 void EmitBytes(const uint8_t *Opcode, size_t Size) {
86 Ops.insert(Ops.end(), Opcode, Opcode + Size)
[all...] |
| /external/smali/dexlib2/src/main/java/org/jf/dexlib2/ |
| Opcodes.java | 49 @Nonnull private final Opcode[] opcodesByValue = new Opcode[255];
50 @Nonnull private final EnumMap<Opcode, Short> opcodeValues;
51 @Nonnull private final HashMap<String, Opcode> opcodesByName;
87 opcodeValues = new EnumMap<Opcode, Short>(Opcode.class);
97 for (Opcode opcode: Opcode.values()) {
101 versionToValueMap = opcode.artVersionToValueMap
112 opcodesByName.put(opcode.name.toLowerCase(), opcode); local
[all...] |
| /external/smali/dexlib2/src/test/java/org/jf/dexlib2/builder/ |
| FixGotoTest.java | 5 import org.jf.dexlib2.Opcode;
22 builder.addInstruction(new BuilderInstruction10t(Opcode.GOTO, gotoTarget));
25 builder.addInstruction(new BuilderInstruction10x(Opcode.NOP));
29 builder.addInstruction(new BuilderInstruction10x(Opcode.RETURN_VOID));
36 Assert.assertEquals(Opcode.GOTO_16, instructions.get(0).getOpcode());
45 builder.addInstruction(new BuilderInstruction10t(Opcode.GOTO, gotoTarget));
48 builder.addInstruction(new BuilderInstruction10x(Opcode.NOP));
52 builder.addInstruction(new BuilderInstruction10x(Opcode.RETURN_VOID));
59 Assert.assertEquals(Opcode.GOTO_32, instructions.get(0).getOpcode());
68 builder.addInstruction(new BuilderInstruction20t(Opcode.GOTO_16, gotoTarget))
[all...] |
| MutableMethodImplementationTest.java | 34 import org.jf.dexlib2.Opcode;
48 builder.addInstruction(new BuilderInstruction10x(Opcode.NOP));
49 builder.addInstruction(new BuilderInstruction10x(Opcode.NOP));
50 builder.addInstruction(new BuilderInstruction10x(Opcode.NOP));
51 builder.addInstruction(new BuilderInstruction10x(Opcode.NOP));
52 builder.addInstruction(new BuilderInstruction10x(Opcode.NOP));
53 builder.addInstruction(new BuilderInstruction32x(Opcode.MOVE_16, 0, 0));
73 builder.addInstruction(new BuilderInstruction10x(Opcode.NOP));
74 builder.addInstruction(new BuilderInstruction10x(Opcode.NOP));
75 builder.addInstruction(new BuilderInstruction10x(Opcode.NOP))
[all...] |
| /external/llvm/lib/Target/AMDGPU/ |
| SIInstrInfo.h | 48 MachineInstr *Inst, unsigned Opcode) const;
51 MachineInstr *Inst, unsigned Opcode) const;
124 // \brief Returns an opcode that can be used to move a value to a \p DstRC
143 bool isMov(unsigned Opcode) const override;
158 bool isSALU(uint16_t Opcode) const {
159 return get(Opcode).TSFlags & SIInstrFlags::SALU;
166 bool isVALU(uint16_t Opcode) const {
167 return get(Opcode).TSFlags & SIInstrFlags::VALU;
174 bool isSOP1(uint16_t Opcode) const {
175 return get(Opcode).TSFlags & SIInstrFlags::SOP1
[all...] |
| /art/tools/dexfuzz/src/dexfuzz/program/mutators/ |
| ConversionRepeater.java | 25 import dexfuzz.rawdex.Opcode;
125 // Flip the opcode.
126 Opcode oppositeOpcode = null;
127 switch (newInsnThere.insn.info.opcode) {
129 oppositeOpcode = Opcode.LONG_TO_INT;
132 oppositeOpcode = Opcode.FLOAT_TO_INT;
135 oppositeOpcode = Opcode.DOUBLE_TO_INT;
138 oppositeOpcode = Opcode.INT_TO_LONG;
141 oppositeOpcode = Opcode.FLOAT_TO_LONG;
144 oppositeOpcode = Opcode.DOUBLE_TO_LONG
194 Opcode opcode = mInsn.insn.info.opcode; local
[all...] |
| /external/smali/dexlib2/src/main/java/org/jf/dexlib2/immutable/instruction/ |
| ImmutableInstructionFactory.java | 34 import org.jf.dexlib2.Opcode;
49 public ImmutableInstruction10t makeInstruction10t(@Nonnull Opcode opcode,
51 return new ImmutableInstruction10t(opcode, codeOffset);
54 public ImmutableInstruction10x makeInstruction10x(@Nonnull Opcode opcode) {
55 return new ImmutableInstruction10x(opcode);
58 public ImmutableInstruction11n makeInstruction11n(@Nonnull Opcode opcode,
61 return new ImmutableInstruction11n(opcode, registerA, literal)
[all...] |
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/mips/ |
| loc-swap-2.d | 17 Opcode Base: 13
20 Opcode 1 has 0 args
21 Opcode 2 has 1 args
22 Opcode 3 has 1 args
23 Opcode 4 has 1 args
24 Opcode 5 has 1 args
25 Opcode 6 has 0 args
26 Opcode 7 has 0 args
27 Opcode 8 has 0 args
28 Opcode 9 has 1 arg
[all...] |
| micromips@loc-swap-2.d | 17 Opcode Base: 13
20 Opcode 1 has 0 args
21 Opcode 2 has 1 args
22 Opcode 3 has 1 args
23 Opcode 4 has 1 args
24 Opcode 5 has 1 args
25 Opcode 6 has 0 args
26 Opcode 7 has 0 args
27 Opcode 8 has 0 args
28 Opcode 9 has 1 arg
[all...] |
| mips16@loc-swap-2.d | 17 Opcode Base: 13
20 Opcode 1 has 0 args
21 Opcode 2 has 1 args
22 Opcode 3 has 1 args
23 Opcode 4 has 1 args
24 Opcode 5 has 1 args
25 Opcode 6 has 0 args
26 Opcode 7 has 0 args
27 Opcode 8 has 0 args
28 Opcode 9 has 1 arg
[all...] |
| loc-swap.d | 20 Opcode Base: 13
23 Opcode 1 has 0 args
24 Opcode 2 has 1 args
25 Opcode 3 has 1 args
26 Opcode 4 has 1 args
27 Opcode 5 has 1 args
28 Opcode 6 has 0 args
29 Opcode 7 has 0 args
30 Opcode 8 has 0 args
31 Opcode 9 has 1 arg
[all...] |
| mips16@loc-swap.d | 20 Opcode Base: 13
23 Opcode 1 has 0 args
24 Opcode 2 has 1 args
25 Opcode 3 has 1 args
26 Opcode 4 has 1 args
27 Opcode 5 has 1 args
28 Opcode 6 has 0 args
29 Opcode 7 has 0 args
30 Opcode 8 has 0 args
31 Opcode 9 has 1 arg
[all...] |
| /external/smali/dexlib2/src/main/java/org/jf/dexlib2/builder/ |
| BuilderInstruction.java | 35 import org.jf.dexlib2.Opcode;
43 @Nonnull protected final Opcode opcode; field in class:BuilderInstruction
47 protected BuilderInstruction(@Nonnull Opcode opcode) {
48 Preconditions.checkFormat(opcode, getFormat());
49 this.opcode = opcode;
52 @Nonnull public Opcode getOpcode() {
53 return opcode;
[all...] |
| /external/smali/dexlib2/src/main/java/org/jf/dexlib2/analysis/ |
| UnresolvedOdexInstruction.java | 34 import org.jf.dexlib2.Opcode;
52 @Override public Opcode getOpcode() {
|
| /external/smali/dexlib2/src/main/java/org/jf/dexlib2/dexbacked/instruction/ |
| DexBackedInstruction10x.java | 34 import org.jf.dexlib2.Opcode;
42 @Nonnull Opcode opcode,
44 super(dexFile, opcode, instructionStart);
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/elf/ |
| dwarf2-1.d | 45 Opcode Base: 16
48 Opcode 1 has 0 args
49 Opcode 2 has 1 args
50 Opcode 3 has 1 args
51 Opcode 4 has 1 args
52 Opcode 5 has 1 args
53 Opcode 6 has 0 args
54 Opcode 7 has 0 args
55 Opcode 8 has 0 args
56 Opcode 9 has 1 arg
[all...] |
| dwarf2-2.d | 45 Opcode Base: 16
48 Opcode 1 has 0 args
49 Opcode 2 has 1 args
50 Opcode 3 has 1 args
51 Opcode 4 has 1 args
52 Opcode 5 has 1 args
53 Opcode 6 has 0 args
54 Opcode 7 has 0 args
55 Opcode 8 has 0 args
56 Opcode 9 has 1 arg
[all...] |
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/i386/ |
| dw2-compress-1.d | 71 Opcode Base: 16
74 Opcode 1 has 0 args
75 Opcode 2 has 1 args
76 Opcode 3 has 1 args
77 Opcode 4 has 1 args
78 Opcode 5 has 1 args
79 Opcode 6 has 0 args
80 Opcode 7 has 0 args
81 Opcode 8 has 0 args
82 Opcode 9 has 1 arg
[all...] |
| /external/javassist/src/main/javassist/expr/ |
| NewArray.java | 30 int opcode; field in class:NewArray
35 opcode = op;
80 if (opcode == Opcode.NEWARRAY) {
84 else if (opcode == Opcode.ANEWARRAY
85 || opcode == Opcode.MULTIANEWARRAY) {
93 throw new RuntimeException("bad opcode: " + opcode);
242 int opcode; field in class:NewArray.ProceedForArray
[all...] |
| /art/tools/dexfuzz/src/dexfuzz/rawdex/formats/ |
| Format21c.java | 21 import dexfuzz.rawdex.Opcode;
67 if (info.opcode == Opcode.CONST_STRING) {
70 if (info.opcode == Opcode.CONST_CLASS
71 || info.opcode == Opcode.CHECK_CAST
72 || info.opcode == Opcode.NEW_INSTANCE) {
|
| /external/llvm/lib/Target/NVPTX/ |
| NVPTXISelDAGToDAG.cpp | 723 unsigned Opcode;
729 Opcode = NVPTX::LD_i8_avar;
732 Opcode = NVPTX::LD_i16_avar;
735 Opcode = NVPTX::LD_i32_avar;
738 Opcode = NVPTX::LD_i64_avar;
741 Opcode = NVPTX::LD_f32_avar;
744 Opcode = NVPTX::LD_f64_avar;
752 NVPTXLD = CurDAG->getMachineNode(Opcode, dl, TargetVT, MVT::Other, Ops);
757 Opcode = NVPTX::LD_i8_asi;
760 Opcode = NVPTX::LD_i16_asi
[all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCTargetTransformInfo.cpp | 101 int PPCTTIImpl::getIntImmCost(unsigned Opcode, unsigned Idx, const APInt &Imm,
104 return BaseT::getIntImmCost(Opcode, Idx, Imm, Ty);
115 switch (Opcode) {
261 unsigned Opcode, Type *Ty, TTI::OperandValueKind Op1Info,
264 assert(TLI->InstructionOpcodeToISD(Opcode) && "Invalid opcode");
267 return BaseT::getArithmeticInstrCost(Opcode, Ty, Op1Info, Op2Info,
284 int PPCTTIImpl::getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src) {
285 assert(TLI->InstructionOpcodeToISD(Opcode) && "Invalid opcode");
[all...] |
| /external/llvm/lib/DebugInfo/DWARF/ |
| DWARFDebugFrame.cpp | 64 /// opcode and an optional sequence of operands.
67 Instruction(uint8_t Opcode)
68 : Opcode(Opcode)
71 uint8_t Opcode;
77 /// Convenience methods to add a new instruction with the given opcode and
79 void addInstruction(uint8_t Opcode) {
80 Instructions.push_back(Instruction(Opcode));
83 void addInstruction(uint8_t Opcode, uint64_t Operand1) {
84 Instructions.push_back(Instruction(Opcode));
[all...] |
| /external/llvm/lib/Target/PowerPC/MCTargetDesc/ |
| PPCPredicates.h | 68 Predicate InvertPredicate(Predicate Opcode);
72 Predicate getSwappedPredicate(Predicate Opcode);
|
| /external/llvm/lib/Target/X86/ |
| X86TargetTransformInfo.h | 66 unsigned Opcode, Type *Ty,
72 int getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src);
73 int getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy);
74 int getVectorInstrCost(unsigned Opcode, Type *Val, unsigned Index);
75 int getMemoryOpCost(unsigned Opcode, Type *Src, unsigned Alignment,
77 int getMaskedMemoryOpCost(unsigned Opcode, Type *Src, unsigned Alignment,
82 int getReductionCost(unsigned Opcode, Type *Ty, bool IsPairwiseForm);
88 int getIntImmCost(unsigned Opcode, unsigned Idx, const APInt &Imm, Type *Ty);
|
