| /external/llvm/lib/MC/ |
| MCInstPrinter.cpp | 31 /// getOpcodeName - Return the name of the specified opcode enum (e.g.
33 StringRef MCInstPrinter::getOpcodeName(unsigned Opcode) const {
34 return MII.getName(Opcode);
|
| /external/llvm/lib/Target/AMDGPU/ |
| R600ExpandSpecialInstrs.cpp | 103 // The native opcode used by PRED_X is stored as an immediate in the
106 MI.getOperand(2).getImm(), // opcode
219 unsigned Opcode = BMI->getOpcode();
223 TII->getOperandIdx(Opcode, AMDGPU::OpName::src0))
226 TII->getOperandIdx(Opcode, AMDGPU::OpName::src1))
315 unsigned Opcode = MI.getOpcode();
316 switch (Opcode) {
318 Opcode = AMDGPU::CUBE_r600_real;
321 Opcode = AMDGPU::CUBE_eg_real;
328 TII->buildDefaultInstruction(MBB, I, Opcode, DstReg, Src0, Src1)
[all...] |
| R600ControlFlowFinalizer.cpp | 56 bool requiresWorkAroundForInst(unsigned Opcode);
59 void pushBranch(unsigned Opcode, bool isWQM = false);
78 bool CFStack::requiresWorkAroundForInst(unsigned Opcode) {
79 if (Opcode == AMDGPU::CF_ALU_PUSH_BEFORE && ST->hasCaymanISA() &&
86 switch(Opcode) {
150 void CFStack::pushBranch(unsigned Opcode, bool isWQM) {
152 switch(Opcode) {
236 unsigned Opcode = 0;
240 Opcode = isEg ? AMDGPU::CF_TC_EG : AMDGPU::CF_TC_R600;
243 Opcode = isEg ? AMDGPU::CF_VC_EG : AMDGPU::CF_VC_R600
[all...] |
| /external/mesa3d/src/gallium/drivers/r300/ |
| r300_vs_draw.c | 246 if (inst->Instruction.Opcode == TGSI_OPCODE_END) {
249 new_inst.Instruction.Opcode = TGSI_OPCODE_MOV;
261 new_inst.Instruction.Opcode = TGSI_OPCODE_MOV;
291 /* Inserting 2 instructions before the END opcode moves all following
292 * labels by 2. Subroutines are always after the END opcode so
294 if (inst->Instruction.Opcode == TGSI_OPCODE_CAL) {
298 * the END opcode. */
300 (inst->Instruction.Opcode == TGSI_OPCODE_IF ||
301 inst->Instruction.Opcode == TGSI_OPCODE_ELSE ||
302 inst->Instruction.Opcode == TGSI_OPCODE_BGNLOOP |
[all...] |
| /external/smali/dexlib2/src/main/java/org/jf/dexlib2/builder/instruction/ |
| BuilderInstruction35c.java | 35 import org.jf.dexlib2.Opcode;
54 public BuilderInstruction35c(@Nonnull Opcode opcode,
62 super(opcode);
79 @Override public int getReferenceType() { return opcode.referenceType; }
|
| /external/smali/dexlib2/src/main/java/org/jf/dexlib2/immutable/instruction/ |
| ImmutableInstruction35c.java | 35 import org.jf.dexlib2.Opcode;
55 public ImmutableInstruction35c(@Nonnull Opcode opcode,
63 super(opcode);
70 this.reference = ImmutableReferenceFactory.of(opcode.referenceType, reference);
95 @Override public int getReferenceType() { return opcode.referenceType; }
|
| ImmutableInstruction35mi.java | 35 import org.jf.dexlib2.Opcode;
52 public ImmutableInstruction35mi(@Nonnull Opcode opcode,
60 super(opcode);
|
| ImmutableInstruction35ms.java | 35 import org.jf.dexlib2.Opcode;
52 public ImmutableInstruction35ms(@Nonnull Opcode opcode,
60 super(opcode);
|
| /external/smali/smalidea/src/main/java/org/jf/smalidea/dexlib/instruction/ |
| SmalideaPackedSwitchPayload.java | 35 import org.jf.dexlib2.Opcode;
56 smaliMethod, Opcode.PACKED_SWITCH, psiInstruction.getOffset());
|
| /external/javassist/src/main/javassist/expr/ |
| FieldAccess.java | 27 int opcode; field in class:FieldAccess
32 opcode = op;
64 return isStatic(opcode);
68 return c == Opcode.GETSTATIC || c == Opcode.PUTSTATIC;
75 return opcode == Opcode.GETFIELD || opcode == Opcode.GETSTATIC;
82 return opcode == Opcode.PUTFIELD || opcode == Opcode.PUTSTATIC
226 int opcode; field in class:FieldAccess.ProceedForRead
274 int opcode; field in class:FieldAccess.ProceedForWrite
[all...] |
| /external/llvm/include/llvm/IR/ |
| Instruction.h | 114 static const char* getOpcodeName(unsigned OpCode);
116 static inline bool isTerminator(unsigned OpCode) {
117 return OpCode >= TermOpsBegin && OpCode < TermOpsEnd;
120 static inline bool isBinaryOp(unsigned Opcode) {
121 return Opcode >= BinaryOpsBegin && Opcode < BinaryOpsEnd;
124 /// @brief Determine if the Opcode is one of the shift instructions.
125 static inline bool isShift(unsigned Opcode) {
126 return Opcode >= Shl && Opcode <= AShr
[all...] |
| /external/mesa3d/src/mesa/program/ |
| prog_optimize.c | 61 ASSERT(arg < _mesa_num_inst_src_regs(inst->Opcode));
68 switch (inst->Opcode) {
138 ASSERT(mov->Opcode == OPCODE_MOV);
225 const GLuint numSrc = _mesa_num_inst_src_regs(inst->Opcode);
269 const GLuint numSrc = _mesa_num_inst_src_regs(inst->Opcode);
324 const GLuint numDst = _mesa_num_inst_dst_regs(inst->Opcode);
392 switch (inst->Opcode) {
409 const GLuint numSrc = _mesa_num_inst_src_regs(inst->Opcode);
418 if (_mesa_num_inst_dst_regs(inst->Opcode) == 1 &&
433 * Is the given instruction opcode a flow-control opcode
[all...] |
| /external/v8/src/compiler/ |
| operator.h | 33 typedef uint16_t Opcode;
55 Operator(Opcode opcode, Properties properties, const char* mnemonic,
63 // the opcode is stored directly in the operator object.
64 Opcode opcode() const { return opcode_; } function in class:v8::internal::compiler::Operator
74 return this->opcode() == that->opcode();
80 virtual size_t HashCode() const { return base::hash<Opcode>()(opcode()); }
[all...] |
| /art/runtime/ |
| dex_instruction.cc | 71 #define INSTRUCTION_SIZE(opcode, c, p, format, r, i, a, v) \
72 ((opcode == NOP) ? -1 : \
84 switch (FormatOf(Opcode())) {
101 Code opcode = static_cast<Code>(insn & 0xFF); local
102 return FlagsOf(opcode) & Instruction::kContinue;
164 const char* opcode = kInstructionNames[Opcode()]; local
165 switch (FormatOf(Opcode())) {
166 case k10x: os << opcode; break; local
167 case k12x: os << StringPrintf("%s v%d, v%d", opcode, VRegA_12x(), VRegB_12x()); break
387 os << opcode << " {"; local
404 os << opcode << " {"; local
418 os << opcode << " {"; local
[all...] |
| /external/llvm/include/llvm/MC/ |
| MCExpr.h | 356 enum Opcode {
364 Opcode Op;
367 MCUnaryExpr(Opcode Op, const MCExpr *Expr)
374 static const MCUnaryExpr *create(Opcode Op, const MCExpr *Expr,
394 Opcode getOpcode() const { return Op; }
409 enum Opcode {
436 Opcode Op;
439 MCBinaryExpr(Opcode Op, const MCExpr *LHS, const MCExpr *RHS)
446 static const MCBinaryExpr *create(Opcode Op, const MCExpr *LHS,
530 Opcode getOpcode() const { return Op;
[all...] |
| /external/llvm/lib/Target/SystemZ/ |
| SystemZISelLowering.h | 108 // This isn't a memory opcode because we'd need to attach two
317 // Return true if OPCODE is some kind of PC-relative address.
318 inline bool isPCREL(unsigned Opcode) {
319 return Opcode == PCREL_WRAPPER || Opcode == PCREL_OFFSET;
380 const char *getTargetNodeName(unsigned Opcode) const override;
462 SelectionDAG &DAG, unsigned Opcode,
483 unsigned Opcode) const;
539 unsigned Opcode) const;
542 unsigned Opcode) const
[all...] |
| /external/mesa3d/src/gallium/drivers/radeon/ |
| R600InstrInfo.cpp | 95 bool R600InstrInfo::isMov(unsigned Opcode) const
99 switch(Opcode) {
110 // an opcode falls into this category.
111 bool R600InstrInfo::isPlaceHolderOpcode(unsigned Opcode) const
113 switch (Opcode) {
122 bool R600InstrInfo::isReductionOp(unsigned Opcode) const
124 switch(Opcode) {
132 bool R600InstrInfo::isCubeOp(unsigned Opcode) const
134 switch(Opcode) {
152 isPredicateSetter(unsigned Opcode)
[all...] |
| /external/mesa3d/src/gallium/drivers/r300/compiler/ |
| radeon_program_alu.c | 44 rc_opcode Opcode, struct rc_sub_instruction * base,
53 fpi->U.I.Opcode = Opcode;
61 rc_opcode Opcode, struct rc_sub_instruction * base,
71 fpi->U.I.Opcode = Opcode;
80 rc_opcode Opcode, struct rc_sub_instruction * base,
91 fpi->U.I.Opcode = Opcode;
199 const struct rc_opcode_info *info = rc_get_opcode_info(inst->U.I.Opcode);
[all...] |
| radeon_dataflow_deadcode.c | 154 const struct rc_opcode_info * opcode = rc_get_opcode_info(inst->U.I.Opcode); local
159 if (opcode->HasDstReg) {
184 for(unsigned int src = 0; src < opcode->NumSrcRegs; ++src) {
233 const struct rc_opcode_info * opcode = rc_get_opcode_info(inst->U.I.Opcode); local
235 switch(opcode->Opcode){
244 opcode = rc_get_opcode_info(ptr->U.I.Opcode);
316 const struct rc_opcode_info * opcode = rc_get_opcode_info(inst->U.I.Opcode); local
[all...] |
| r3xx_vertprog.c | 375 const struct rc_opcode_info *info = rc_get_opcode_info(vpi->Opcode);
395 (vpi->Opcode != RC_OPCODE_SEQ &&
396 vpi->Opcode != RC_OPCODE_SNE));
398 switch (vpi->Opcode) {
511 rc_error(&compiler->Base, "Unknown opcode %s\n", info->Name);
568 const struct rc_opcode_info * opcode = rc_get_opcode_info(inst->U.I.Opcode); local
570 for (i = 0; i < opcode->NumSrcRegs; ++i) {
577 if (opcode->HasDstReg) {
591 const struct rc_opcode_info * opcode = rc_get_opcode_info(inst->U.I.Opcode) local
626 const struct rc_opcode_info * opcode = rc_get_opcode_info(inst->U.I.Opcode); local
667 const struct rc_opcode_info *opcode = rc_get_opcode_info(inst->U.I.Opcode); local
706 const struct rc_opcode_info * opcode = rc_get_opcode_info(inst->U.I.Opcode); local
812 const struct rc_opcode_info * opcode = rc_get_opcode_info(inst->U.I.Opcode); local
827 const struct rc_opcode_info * opcode = rc_get_opcode_info(inst->U.I.Opcode); local
[all...] |
| /art/tools/dexfuzz/src/dexfuzz/program/ |
| CodeTranslator.java | 24 import dexfuzz.rawdex.Opcode;
554 nop.insn.info = Instruction.getOpcodeInfo(Opcode.NOP);
567 * Determine if a particular instruction is a branch instruction, based on opcode.
570 Opcode opcode = insn.info.opcode; local
571 if (Opcode.isBetween(opcode, Opcode.IF_EQ, Opcode.IF_LEZ
582 Opcode opcode = insn.info.opcode; local
[all...] |
| /external/mesa3d/src/gallium/drivers/r300/compiler/tests/ |
| rc_test_helpers.c | 297 struct match_info Opcode;
334 tokens.Opcode.String = inst_str + matches[1].rm_so;
335 tokens.Opcode.Length = match_length(matches, 1);
347 if (strncmp(tokens.Opcode.String, info->Name, tokens.Opcode.Length)) {
350 inst->U.I.Opcode = info->Opcode;
|
| /external/smali/smali/src/test/java/ |
| ImplicitReferenceTest.java | 36 import org.jf.dexlib2.Opcode;
89 Assert.assertEquals(Opcode.INVOKE_STATIC, instruction.getOpcode());
96 Assert.assertEquals(Opcode.INVOKE_STATIC, instruction.getOpcode());
103 Assert.assertEquals(Opcode.INVOKE_STATIC, instruction.getOpcode());
184 Assert.assertEquals(Opcode.SGET_OBJECT, instruction.getOpcode());
191 Assert.assertEquals(Opcode.SGET_OBJECT, instruction.getOpcode());
198 Assert.assertEquals(Opcode.SGET_OBJECT, instruction.getOpcode());
|
| /external/clang/include/clang/StaticAnalyzer/Core/PathSensitive/ |
| SymbolManager.h | 346 BinaryOperator::Opcode Op;
350 BinarySymExpr(Kind k, BinaryOperator::Opcode op, QualType t)
358 BinaryOperator::Opcode getOpcode() const { return Op; }
373 SymIntExpr(const SymExpr *lhs, BinaryOperator::Opcode op,
383 BinaryOperator::Opcode op, const llvm::APSInt& rhs,
408 IntSymExpr(const llvm::APSInt& lhs, BinaryOperator::Opcode op,
418 BinaryOperator::Opcode op, const SymExpr *rhs,
443 SymSymExpr(const SymExpr *lhs, BinaryOperator::Opcode op, const SymExpr *rhs,
453 BinaryOperator::Opcode op, const SymExpr *rhs, QualType t) {
526 const SymIntExpr *getSymIntExpr(const SymExpr *lhs, BinaryOperator::Opcode op
[all...] |
| /external/smali/baksmali/src/main/java/org/jf/baksmali/Adaptors/ |
| MethodDefinition.java | 38 import org.jf.dexlib2.Opcode;
107 Opcode opcode = instruction.getOpcode(); local
108 if (opcode == Opcode.PACKED_SWITCH) {
113 targetOffset = findPayloadOffset(targetOffset, Opcode.PACKED_SWITCH_PAYLOAD);
120 findSwitchPayload(targetOffset, Opcode.PACKED_SWITCH_PAYLOAD);
122 effectiveInstructions.set(i, new ImmutableInstruction31t(opcode,
129 } else if (opcode == Opcode.SPARSE_SWITCH)
436 Opcode opcode = instruction.getOpcode(); local
[all...] |
