| /external/llvm/lib/CodeGen/ |
| TargetInstrInfo.cpp | [all...] |
| /external/llvm/lib/Target/Mips/ |
| MipsSEISelLowering.cpp | 39 const MipsSubtarget &STI)
40 : MipsTargetLowering(TM, STI) {
232 const MipsSubtarget &STI) {
233 return new MipsSETargetLowering(TM, STI);
[all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64InstrInfo.cpp | 31 AArch64InstrInfo::AArch64InstrInfo(const AArch64Subtarget &STI)
33 RI(STI.getTargetTriple()), Subtarget(STI) {}
[all...] |
| AArch64ISelLowering.cpp | 66 const AArch64Subtarget &STI)
67 : TargetLowering(TM), Subtarget(&STI) {
[all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonInstrInfo.cpp | [all...] |
| /toolchain/binutils/binutils-2.25/gas/config/ |
| bfin-parse.y | 487 %token STI CLI
[all...] |
| /external/llvm/tools/llvm-objdump/ |
| MachODump.cpp | [all...] |
| /external/llvm/lib/Target/AArch64/AsmParser/ |
| AArch64AsmParser.cpp | 118 AArch64AsmParser(const MCSubtargetInfo &STI, MCAsmParser &Parser,
120 : MCTargetAsmParser(Options, STI) {
[all...] |
| /external/llvm/lib/Target/AMDGPU/ |
| AMDGPUISelLowering.cpp | 66 const AMDGPUSubtarget &STI)
67 : TargetLowering(TM), Subtarget(&STI) {
[all...] |
| /external/llvm/lib/Target/Sparc/ |
| SparcISelLowering.cpp | [all...] |
| /external/mesa3d/src/mesa/x86/ |
| assyntax.h | 663 #define STI CHOICE(sti, sti, sti)
[all...] |
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/bfin/ |
| allinsn16.d | 72 [^:]+: 40 00 + STI R0;
73 [^:]+: 41 00 + STI R1;
74 [^:]+: 42 00 + STI R2;
75 [^:]+: 43 00 + STI R3;
76 [^:]+: 44 00 + STI R4;
77 [^:]+: 45 00 + STI R5;
78 [^:]+: 46 00 + STI R6;
79 [^:]+: 47 00 + STI R7;
[all...] |
| /external/llvm/lib/Target/SystemZ/ |
| SystemZISelLowering.cpp | 85 const SystemZSubtarget &STI)
86 : TargetLowering(TM), Subtarget(STI) {
[all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCISelLowering.cpp | 58 const PPCSubtarget &STI)
59 : TargetLowering(TM), Subtarget(STI) {
[all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMISelLowering.cpp | 163 const ARMSubtarget &STI)
164 : TargetLowering(TM), Subtarget(&STI) {
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86ISelLowering.cpp | 72 const X86Subtarget &STI)
73 : TargetLowering(TM), Subtarget(&STI) {
[all...] |
