/toolchain/binutils/binutils-2.25/gas/testsuite/gas/arm/ |
thumb32.d | 122 0[0-9a-f]+ <[^>]+> eb45 0000 adc\.w r0, r5, r0 123 0[0-9a-f]+ <[^>]+> eb41 0002 adc\.w r0, r1, r2 124 0[0-9a-f]+ <[^>]+> eb40 0900 adc\.w r9, r0, r0 125 0[0-9a-f]+ <[^>]+> eb49 0000 adc\.w r0, r9, r0 126 0[0-9a-f]+ <[^>]+> eb40 0009 adc\.w r0, r0, r9 128 0[0-9a-f]+ <[^>]+> eb41 4062 adc\.w r0, r1, r2, asr #17 129 0[0-9a-f]+ <[^>]+> f141 0081 adc\.w r0, r1, #129 ; 0x81 [all...] |
thumb32.s | 149 arit3 adc adcs adc.w adcs.w
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/external/valgrind/exp-bbv/tests/arm-linux/ |
ll.S | 206 adc r3,r3,#0 @ round 337 adc r3,r3,#0 @ round?
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/external/llvm/test/MC/ARM/ |
diagnostics.s | 15 adc r1, r2, r3, lsl #invalid 16 adc r4, r5, r6, lsl #-1 17 adc r4, r5, r6, lsl #32 18 adc r4, r5, r6, lsr #-1 19 adc r4, r5, r6, lsr #33 20 adc r4, r5, r6, asr #-1 21 adc r4, r5, r6, asr #33 22 adc r4, r5, r6, ror #-1 23 adc r4, r5, r6, ror #32 26 @ CHECK-ERRORS: adc r1, r2, r3, lsl #invali [all...] |
/external/v8/src/x87/ |
assembler-x87.h | 663 void adc(Register dst, int32_t imm32); 664 void adc(Register dst, const Operand& src); [all...] |
assembler-x87.cc | 621 void Assembler::adc(Register dst, int32_t imm32) { function in class:v8::internal::Assembler 627 void Assembler::adc(Register dst, const Operand& src) { function in class:v8::internal::Assembler [all...] |
/toolchain/binutils/binutils-2.25/gas/testsuite/gas/msp430/ |
msp430x.d | 8 0+0000 <[^>]*> 04 63 adc r4 ;
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/art/compiler/utils/ |
assembler_thumb_test.cc | 247 __ adc(R0, R1, ShifterOperand(R2), AL, kCcKeep); 330 __ adc(R0, R0, ShifterOperand(R1), arm::EQ, kCcKeep); 348 __ adc(R0, R0, ShifterOperand(R1)); 379 __ adc(R0, R1, ShifterOperand(0x55)); 410 __ adc(R0, R1, ShifterOperand(0x550055)); [all...] |
/art/compiler/utils/arm/ |
assembler_arm.h | 479 virtual void adc(Register rd, Register rn, const ShifterOperand& so, 483 adc(rd, rn, so, cond, kCcSet); [all...] |
assembler_arm32.h | 56 virtual void adc(Register rd, Register rn, const ShifterOperand& so,
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assembler_arm32_test.cc | 779 TEST_F(AssemblerArm32Test, Adc) { 780 T5Helper(&arm::Arm32Assembler::adc, false, "adc{cond}{s} {reg1}, {reg2}, {shift}", "adc"); 784 T4Helper(&arm::Arm32Assembler::adcs, false, "adc{cond}s {reg1}, {reg2}, {shift}", "adcs");
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assembler_thumb2.h | 86 virtual void adc(Register rd, Register rn, const ShifterOperand& so, [all...] |
/toolchain/binutils/binutils-2.25/gas/testsuite/gas/ia64/ |
opc-i.d | 267 adc: f0 04 0c 58 tf\.z\.and p2,p3=39
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/art/disassembler/ |
disassembler_x86.cc | 331 DISASSEMBLER_ENTRY(adc, [all...] |
/external/v8/src/arm/ |
disasm-arm.cc | 941 case ADC: { 942 Format(instr, "adc'cond's 'rd, 'rn, 'shift_op"); [all...] |
/external/v8/test/cctest/ |
test-assembler-arm.cc | 967 __ adc(r1, r1, Operand(r1), LeaveCC, cs); 972 __ adc(r2, r2, Operand(r2), LeaveCC, cs); 979 __ adc(r3, r1, Operand(r2)); 985 __ adc(r3, r1, Operand(r2)); [all...] |
/external/valgrind/exp-bbv/tests/amd64-linux/ |
ll.S | 319 adc $0, %eax # round
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/external/valgrind/exp-bbv/tests/x86-linux/ |
ll.S | 315 adc $0, %eax # round
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/external/mesa3d/src/mesa/x86/ |
assyntax.h | 384 #define ADC_L(a, b) CHOICE(adcl ARG2(a,b), adcl ARG2(a,b), _LTOG adc ARG2(b,a)) 385 #define ADC_W(a, b) CHOICE(adcw ARG2(a,b), adcw ARG2(a,b), _WTOG adc ARG2(b,a)) [all...] |
/external/v8/src/ia32/ |
assembler-ia32.h | 671 void adc(Register dst, int32_t imm32); 672 void adc(Register dst, const Operand& src); [all...] |
/external/zlib/src/contrib/masmx64/ |
gvmat64.asm | 470 adc rdx, 0
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/external/zlib/src/contrib/masmx86/ |
match686.asm | 386 adc edx, 0
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/toolchain/binutils/binutils-2.25/gas/testsuite/gas/score/ |
branch_32.d | 79 adc: 93ff 0dc2 bleu 0x89e
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/external/valgrind/VEX/test/ |
test-amd64.c | 87 #define OP adc [all...] |
test-i386.c | 77 #define OP adc [all...] |