| /frameworks/rs/cpu_ref/ |
| rsCpuIntrinsics_advsimd_Blend.S | 421 eor v0.16b, v0.16b, v8.16b
422 eor v1.16b, v1.16b, v9.16b
423 eor v2.16b, v2.16b, v10.16b
424 eor v3.16b, v3.16b, v11.16b
|
| rsCpuIntrinsics_neon_Resize.S | 390 eor r12, lr, #CHUNKSIZE * COMPONENT_COUNT * 2
|
| /external/llvm/test/MC/AArch64/ |
| basic-a64-diagnostics.s | [all...] |
| basic-a64-instructions.s | [all...] |
| arm64-diags.s | 262 eor w0, w0, w0, lsl #32 label
264 ; CHECK-ERRORS: eor w0, w0, w0, lsl #32
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/arm/ |
| thumb2_bad_reg.l | 86 [^:]*:[0-9]+: Error: r13 not allowed here -- `eor r13,r0,#1'
87 [^:]*:[0-9]+: Error: r15 not allowed here -- `eor r15,r0,#1'
88 [^:]*:[0-9]+: Error: r13 not allowed here -- `eor r0,r13,#1'
89 [^:]*:[0-9]+: Error: r15 not allowed here -- `eor r0,r15,#1'
90 [^:]*:[0-9]+: Error: r13 not allowed here -- `eor.w r13,r0,r1'
91 [^:]*:[0-9]+: Error: r15 not allowed here -- `eor.w r15,r0,r1'
92 [^:]*:[0-9]+: Error: r13 not allowed here -- `eor.w r0,r13,r1'
93 [^:]*:[0-9]+: Error: r15 not allowed here -- `eor.w r0,r15,r1'
94 [^:]*:[0-9]+: Error: r13 not allowed here -- `eor.w r0,r1,r13'
95 [^:]*:[0-9]+: Error: r15 not allowed here -- `eor.w r0,r1,r15
[all...] |
| thumb32.d | 161 0[0-9a-f]+ <[^>]+> ea85 0000 eor\.w r0, r5, r0
162 0[0-9a-f]+ <[^>]+> ea81 0002 eor\.w r0, r1, r2
163 0[0-9a-f]+ <[^>]+> ea80 0900 eor\.w r9, r0, r0
164 0[0-9a-f]+ <[^>]+> ea89 0000 eor\.w r0, r9, r0
165 0[0-9a-f]+ <[^>]+> ea80 0009 eor\.w r0, r0, r9
167 0[0-9a-f]+ <[^>]+> ea81 4062 eor\.w r0, r1, r2, asr #17
168 0[0-9a-f]+ <[^>]+> f081 0081 eor\.w r0, r1, #129 ; 0x81
[all...] |
| thumb32.s | 152 arit3 eor eors eor.w eors.w
|
| /art/runtime/arch/arm64/ |
| quick_entrypoints_arm64.S | 1093 eor w2, w1, w2 // lock_word.ThreadId() ^ self->ThreadId()
[all...] |
| /bionic/libc/arch-arm/generic/bionic/ |
| memcpy.S | 96 eor r12, r0, r1
|
| /toolchain/binutils/binutils-2.25/include/opcode/ |
| avr.h | 192 AVR_INSN (eor, "r,r", "001001rdddddrrrr", 1, AVR_ISA_1200, 0x2400)
199 /* Shorthand for {eor,add,adc,and} r,r above. */
|
| /external/v8/test/cctest/ |
| test-disasm-arm64.cc | 131 COMPARE(dci(0x521e0400), "eor w0, w0, #0xc");
657 COMPARE(eor(w15, w16, Operand(0x00000001)),
658 "eor w15, w16, #0x1");
659 COMPARE(eor(x17, x18, Operand(0x0000000000000003L)),
660 "eor x17, x18, #0x3");
675 "eor w19, w20, #0x7ffffffe");
677 "eor x21, x22, #0x3ffffffffffffffc");
686 COMPARE(eor(wcsp, w0, Operand(31)), "eor wcsp, w0, #0x1f");
736 COMPARE(eor(w0, w1, Operand(w2)), "eor w0, w1, w2")
[all...] |
| /external/v8/src/arm/ |
| macro-assembler-arm.cc | 220 eor(reg1, reg1, Operand(reg2), LeaveCC, cond);
221 eor(reg2, reg2, Operand(reg1), LeaveCC, cond);
222 eor(reg1, reg1, Operand(reg2), LeaveCC, cond);
[all...] |
| disasm-arm.cc | 925 case EOR: {
926 Format(instr, "eor'cond's 'rd, 'rn, 'shift_op");
[all...] |
| /external/valgrind/none/tests/arm/ |
| v6intThumb.stdout.exp | [all...] |
| /art/runtime/arch/arm/ |
| quick_entrypoints_arm.S | 553 eor r2, r1, r2 @ lock_word.ThreadId() ^ self->ThreadId()
604 eor r3, r3, r2 @ lock_word.ThreadId() ^ self->ThreadId()
[all...] |
| /external/llvm/test/MC/ARM/ |
| diagnostics.s | 652 eor r7, r8, #-2149, #0
653 eor r7, r8, #100, #1
|
| basic-thumb2-instructions.s | 673 @ EOR
675 eor r4, r5, #0xf000
676 eor r4, r5, r6
677 eor r4, r5, r6, lsl #5
678 eor r4, r5, r6, lsr #5
679 eor r4, r5, r6, lsr #5
680 eor r4, r5, r6, asr #5
681 eor r4, r5, r6, ror #5
683 @ CHECK: eor r4, r5, #61440 @ encoding: [0x85,0xf4,0x70,0x44]
684 @ CHECK: eor.w r4, r5, r6 @ encoding: [0x85,0xea,0x06,0x04
[all...] |
| /external/v8/src/regexp/arm/ |
| regexp-macro-assembler-arm.cc | 538 __ eor(r0, current_character(), Operand(0x01));
555 __ eor(r0, current_character(), Operand(0x01));
[all...] |
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/epiphany/ |
| regression.d | 245 1c8: ad0a eor r5,r3,r2
|
| /art/compiler/utils/ |
| assembler_thumb_test.cc | 245 __ eor(R0, R1, ShifterOperand(R2), AL, kCcKeep);
338 __ eor(R0, R0, ShifterOperand(R1), arm::EQ, kCcKeep);
352 __ eor(R0, R0, ShifterOperand(R1));
377 __ eor(R0, R1, ShifterOperand(0x55));
408 __ eor(R0, R1, ShifterOperand(0x550055));
[all...] |
| /art/compiler/optimizing/ |
| intrinsics_arm.cc | 300 __ eor(out_reg_lo, mask, ShifterOperand(out_reg_lo));
301 __ eor(out_reg_hi, mask, ShifterOperand(out_reg_hi));
308 __ eor(out_reg, mask, ShifterOperand(out_reg));
[all...] |
| /art/compiler/utils/arm/ |
| assembler_arm.h | 451 virtual void eor(Register rd, Register rn, const ShifterOperand& so,
455 eor(rd, rn, so, cond, kCcSet);
[all...] |
| assembler_arm32.h | 44 virtual void eor(Register rd, Register rn, const ShifterOperand& so,
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/aarch64/ |
| illegal.s | 479 eor w0, w1, w2, ror #32
|
