| /external/v8/test/mjsunit/es6/ |
| block-let-crankshaft-sloppy.js | 33 f27, f28, f29, f30, f31, f32, f33];
272 function f32() { function
|
| block-let-crankshaft.js | 35 f27, f28, f29, f30, f31, f32, f33];
274 function f32() { function
|
| /frameworks/rs/java/tests/Refocus/src/com/android/rs/test/ |
| MainActivity.java | 121 RenderScriptTask renderScriptTask = new RenderScriptTask(params[0].mRenderScript, RenderScriptTask.script.f32);
|
| /frameworks/rs/java/tests/Refocus/src/com/android/rs/test/f32/ |
| RefocusFilterF32.java | 1 package com.android.rs.refocus.f32;
|
| /external/llvm/lib/Target/AArch64/ |
| AArch64FastISel.cpp | 296 case MVT::f32:
359 if (VT != MVT::f32 && VT != MVT::f64)
486 if (VT != MVT::f32 && VT != MVT::f64)
[all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonISelLowering.cpp | 175 if (LocVT == MVT::i32 || LocVT == MVT::f32) {
247 if (LocVT == MVT::i32 || LocVT == MVT::f32) {
427 if (LocVT == MVT::i32 || LocVT == MVT::f32) {
447 if (LocVT == MVT::i32 || LocVT == MVT::f32) {
[all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMISelLowering.cpp | 440 addRegisterClass(MVT::f32, &ARM::SPRRegClass);
460 setOperationAction(ISD::ConstantFP, MVT::f32, Custom);
681 setOperationAction(ISD::FP_ROUND, MVT::f32, Custom);
689 setLoadExtAction(ISD::EXTLOAD, VT, MVT::f32, Expand);
694 setTruncStoreAction(MVT::f64, MVT::f32, Expand);
695 setTruncStoreAction(MVT::f32, MVT::f16, Expand);
[all...] |
| /external/llvm/test/MC/ARM/ |
| neon-vld-encoding.s | 173 vld3.f32 {d1, d2, d3}, [r6]!
215 vld4.f32 {d16, d17, d18, d19}, [r3:64], r5
318 vld3.f32 {d1[1], d2[1], d3[1]}, [r6]!
355 vld3.f32 {d16[], d17[], d18[]}, [r3], r5
394 vld4.f32 {d16[1], d17[1], d18[1], d19[1]}, [r3:64], r5
431 vld4.f32 {d16[], d17[], d18[], d19[]}, [r3], r5
472 vld1.f32 {q2}, [r2]
|
| neon-add-encoding.s | 12 @ CHECK: vadd.f32 d16, d16, d17 @ encoding: [0xa1,0x0d,0x40,0xf2]
13 vadd.f32 d16, d16, d17
14 @ CHECK: vadd.f32 q8, q8, q9 @ encoding: [0xe2,0x0d,0x40,0xf2]
15 vadd.f32 q8, q8, q9
|
| /external/deqp/modules/gles3/functional/ |
| es3fInstancedRenderingTests.cpp | 73 float f32; member in union:deqp::gles3::Functional::vcns::VarComp
77 VarComp(float v) : f32(v) {}
|
| /external/mesa3d/src/gallium/drivers/nv50/codegen/ |
| nv50_ir_build_util.cpp | 385 float f32; member in union:nv50_ir::__anon19081
388 u.f32 = f;
|
| /external/mesa3d/src/gallium/drivers/radeon/ |
| SIISelLowering.cpp | 31 addRegisterClass(MVT::f32, &AMDGPU::VReg_32RegClass);
56 setOperationAction(ISD::SELECT_CC, MVT::f32, Custom);
|
| /external/opencv3/3rdparty/include/ffmpeg_/libavutil/ |
| intreadwrite.h | 33 float f32[2]; member in union:__anon20027
40 float f32; member in union:__anon20028
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/ia64/ |
| dv-raw-err.s | 121 fadd f2 = f1, f32 // read from rotating register region
501 mov f32 = f33
|
| dv-waw-err.s | 457 mov f32 = f33
469 mov f32 = f33
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/mips/ |
| mips16-intermix.d | 50 0+[0-9a-f]+ T f32
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/sparc/ |
| crypto.d | 27 44: 87 b0 66 80 des_ip %f32, %f34
|
| hpcvis3.d | 50 a0: 8b b0 44 23 fsll16 %f32, %f34, %f36
|
| /toolchain/binutils/binutils-2.25/ld/testsuite/ld-arm/ |
| cortex-a8-fix-b-rel-thumb.d | 24 8f32: eb01 0002 add\.w r0, r1, r2
|
| cortex-a8-fix-b.d | 21 8f32: eb01 0002 add\.w r0, r1, r2
|
| cortex-a8-fix-bcc-rel-thumb.d | 24 8f32: eb01 0002 add\.w r0, r1, r2
|
| cortex-a8-fix-bcc.d | 21 8f32: eb01 0002 add\.w r0, r1, r2
|
| cortex-a8-fix-bl-rel-plt.d | 37 8f32: eb01 0002 add\.w r0, r1, r2
|
| cortex-a8-fix-bl.d | 21 8f32: eb01 0002 add\.w r0, r1, r2
|
| /external/clang/test/CodeGen/ |
| x86_64-arguments.c | 247 _Complex float f32(_Complex float A, _Complex float B) { function
249 // CHECK-LABEL: define <2 x float> @f32(<2 x float> %A.coerce, <2 x float> %B.coerce)
|
