|   /external/llvm/include/llvm/MC/ | 
| MCInstrAnalysis.h  | 35     return Info->get(Inst.getOpcode()).isBranch(); 39     return Info->get(Inst.getOpcode()).isConditionalBranch(); 43     return Info->get(Inst.getOpcode()).isUnconditionalBranch(); 47     return Info->get(Inst.getOpcode()).isIndirectBranch(); 51     return Info->get(Inst.getOpcode()).isCall(); 55     return Info->get(Inst.getOpcode()).isReturn(); 59     return Info->get(Inst.getOpcode()).isTerminator();
  | 
|   /external/smali/dexlib2/src/main/java/org/jf/dexlib2/iface/instruction/ | 
| Instruction.java  | 49     Opcode getOpcode();
  | 
|   /external/smali/dexlib2/src/main/java/org/jf/dexlib2/analysis/ | 
| UnresolvedOdexInstruction.java  | 52     @Override public Opcode getOpcode() { 53         return originalInstruction.getOpcode();
  | 
|   /dalvik/dexgen/src/com/android/dexgen/dex/code/ | 
| FixedSizeInsn.java  | 52         return getOpcode().getFormat().codeSize(); 58         getOpcode().getFormat().writeTo(out, this); 70         return getOpcode().getFormat().listingString(this, noteIndices);
  | 
|   /dalvik/dx/src/com/android/dx/dex/code/ | 
| FixedSizeInsn.java  | 53         return getOpcode().getFormat().codeSize(); 59         getOpcode().getFormat().writeTo(out, this); 71         return getOpcode().getFormat().listingString(this, noteIndices);
  | 
|   /external/dexmaker/src/dx/java/com/android/dx/dex/code/ | 
| FixedSizeInsn.java  | 53         return getOpcode().getFormat().codeSize(); 59         getOpcode().getFormat().writeTo(out, this); 71         return getOpcode().getFormat().listingString(this, noteIndices);
  | 
|   /external/llvm/lib/Target/WebAssembly/ | 
| WebAssemblyFastISel.cpp  | 68   switch (I->getOpcode()) { 75   return selectOperator(I, I->getOpcode());
  | 
| WebAssemblyRegStackify.cpp  | 96     if (Def->getOpcode() == TargetOpcode::PHI) 140       if (Insert->getOpcode() == TargetOpcode::PHI) 145       if (Insert->getOpcode() == TargetOpcode::INLINEASM) 174         if (Def->getOpcode() == TargetOpcode::IMPLICIT_DEF) 179         if (Def->getOpcode() == TargetOpcode::INLINEASM) 183         if (Def->getOpcode() == TargetOpcode::PHI) 188         if (Def->getOpcode() == WebAssembly::ARGUMENT_I32 || 189             Def->getOpcode() == WebAssembly::ARGUMENT_I64 || 190             Def->getOpcode() == WebAssembly::ARGUMENT_F32 || 191             Def->getOpcode() == WebAssembly::ARGUMENT_F64     [all...] | 
|   /external/llvm/lib/MC/ | 
| MCInstrAnalysis.cpp  | 16       Info->get(Inst.getOpcode()).OpInfo[0].OperandType != MCOI::OPERAND_PCREL)
  | 
|   /dalvik/dx/src/com/android/dx/ssa/ | 
| NormalSsaInsn.java  | 133     public Rop getOpcode() { 134         return insn.getOpcode(); 148         if (insn.getOpcode().getOpcode() == RegOps.MARK_LOCAL) { 185         return insn.getOpcode().getOpcode() == RegOps.MOVE; 191         return insn.getOpcode().getOpcode() == RegOps.MOVE_EXCEPTION; 223         Rop opcode = getOpcode(); 232         switch (opcode.getOpcode()) {     [all...] | 
|   /external/dexmaker/src/dx/java/com/android/dx/ssa/ | 
| NormalSsaInsn.java  | 128     public Rop getOpcode() { 129         return insn.getOpcode(); 143         if (insn.getOpcode().getOpcode() == RegOps.MARK_LOCAL) { 180         return insn.getOpcode().getOpcode() == RegOps.MOVE; 186         return insn.getOpcode().getOpcode() == RegOps.MOVE_EXCEPTION; 218         Rop opcode = getOpcode(); 227         switch (opcode.getOpcode()) {     [all...] | 
|   /frameworks/base/services/core/java/com/android/server/hdmi/ | 
| DelayedMessageBuffer.java  | 49         switch (message.getOpcode()) { 71             if (message.getOpcode() == Constants.MESSAGE_ACTIVE_SOURCE) { 79             if (message.getOpcode() == opcode) { 115             if (message.getOpcode() == Constants.MESSAGE_ACTIVE_SOURCE 140             if (message.getOpcode() == Constants.MESSAGE_ACTIVE_SOURCE
  | 
|   /external/llvm/lib/Target/AMDGPU/ | 
| R600EmitClauseMarkers.cpp  | 42     switch (MI->getOpcode()) { 56     if (TII->isLDSRetInstr(MI->getOpcode())) 60         TII->isCubeOp(MI->getOpcode()) || 61         TII->isReductionOp(MI->getOpcode())) 75     if (TII->isALUInstr(MI->getOpcode())) 77     if (TII->isVector(*MI) || TII->isCubeOp(MI->getOpcode())) 79     switch (MI->getOpcode()) { 93     switch (MI->getOpcode()) { 122     if (!TII->isALUInstr(MI->getOpcode()) && MI->getOpcode() != AMDGPU::DOT_4     [all...] | 
|   /external/llvm/include/llvm/IR/ | 
| Operator.h  | 48   unsigned getOpcode() const { 50       return I->getOpcode(); 51     return cast<ConstantExpr>(this)->getOpcode(); 56   static unsigned getOpcode(const Value *V) { 58       return I->getOpcode(); 60       return CE->getOpcode(); 107     return I->getOpcode() == Instruction::Add || 108            I->getOpcode() == Instruction::Sub || 109            I->getOpcode() == Instruction::Mul || 110            I->getOpcode() == Instruction::Shl     [all...] | 
| Instruction.h  | 104   /// getOpcode() returns a member of one of the enums like Instruction::Add. 105   unsigned getOpcode() const { return getValueID() - InstructionVal; } 107   const char *getOpcodeName() const { return getOpcodeName(getOpcode()); } 108   bool isTerminator() const { return isTerminator(getOpcode()); } 109   bool isBinaryOp() const { return isBinaryOp(getOpcode()); } 110   bool isShift() { return isShift(getOpcode()); } 111   bool isCast() const { return isCast(getOpcode()); } 112   bool isFuncletPad() const { return isFuncletPad(getOpcode()); } 132     return getOpcode() == Shl || getOpcode() == LShr     [all...] | 
|   /external/llvm/lib/Target/PowerPC/ | 
| PPCBranchSelector.cpp  | 143         if (I->getOpcode() == PPC::BCC && !I->getOperand(2).isImm()) 145         else if ((I->getOpcode() == PPC::BC || I->getOpcode() == PPC::BCn) && 148         else if ((I->getOpcode() == PPC::BDNZ8 || I->getOpcode() == PPC::BDNZ || 149                   I->getOpcode() == PPC::BDZ8  || I->getOpcode() == PPC::BDZ) && 188         if (I->getOpcode() == PPC::BCC) { 199         } else if (I->getOpcode() == PPC::BC) { 202         } else if (I->getOpcode() == PPC::BCn)      [all...] | 
| PPCEarlyReturn.cpp  | 66           (I->getOpcode() != PPC::BLR && I->getOpcode() != PPC::BLR8) || 82           if (J->getOpcode() == PPC::B) { 86               BuildMI(**PI, J, J->getDebugLoc(), TII->get(I->getOpcode())) 94           } else if (J->getOpcode() == PPC::BCC) { 108           } else if (J->getOpcode() == PPC::BC || J->getOpcode() == PPC::BCn) { 114                   TII->get(J->getOpcode() == PPC::BC ? PPC::BCLR : PPC::BCLRn))
  | 
|   /dalvik/dx/src/com/android/dx/rop/code/ | 
| PlainInsn.java  | 92         return new PlainInsn(getOpcode(), getPosition(), 115                 Rop newRop = Rops.ropFor(getOpcode().getOpcode(), getResult(), 130                 int opcode = getOpcode().getOpcode(); 152         return new PlainInsn(getOpcode(), getPosition(),
  | 
|   /external/dexmaker/src/dx/java/com/android/dx/rop/code/ | 
| PlainInsn.java  | 92         return new PlainInsn(getOpcode(), getPosition(), 115                 Rop newRop = Rops.ropFor(getOpcode().getOpcode(), getResult(), 130                 int opcode = getOpcode().getOpcode(); 152         return new PlainInsn(getOpcode(), getPosition(),
  | 
|   /external/llvm/lib/Target/Hexagon/ | 
| HexagonNewValueJump.cpp  | 132   if (II->getOpcode() == TargetOpcode::KILL) 182   if (MII->getOpcode() == Hexagon::J2_call) 196     if (MII->getOpcode() == TargetOpcode::KILL || 197         MII->getOpcode() == TargetOpcode::PHI  || 198         MII->getOpcode() == TargetOpcode::COPY) 205     if (MII->getOpcode() == Hexagon::LDriw_pred     || 206         MII->getOpcode() == Hexagon::STriw_pred) 230          ((MI->getOpcode() == Hexagon::C2_cmpeqi || 231            MI->getOpcode() == Hexagon::C2_cmpgti) && 248       if (def->getOpcode() == TargetOpcode::COPY     [all...] | 
|   /external/llvm/unittests/Transforms/Utils/ | 
| IntegerDivision.cpp  | 42   EXPECT_TRUE(BB->front().getOpcode() == Instruction::SDiv); 47   EXPECT_TRUE(BB->front().getOpcode() == Instruction::AShr); 50   EXPECT_TRUE(Quotient && Quotient->getOpcode() == Instruction::Sub); 72   EXPECT_TRUE(BB->front().getOpcode() == Instruction::UDiv); 77   EXPECT_TRUE(BB->front().getOpcode() == Instruction::ICmp); 80   EXPECT_TRUE(Quotient && Quotient->getOpcode() == Instruction::PHI); 102   EXPECT_TRUE(BB->front().getOpcode() == Instruction::SRem); 107   EXPECT_TRUE(BB->front().getOpcode() == Instruction::AShr); 110   EXPECT_TRUE(Remainder && Remainder->getOpcode() == Instruction::Sub); 132   EXPECT_TRUE(BB->front().getOpcode() == Instruction::URem)     [all...] | 
|   /external/llvm/include/llvm/CodeGen/ | 
| SelectionDAGNodes.h  | 159   inline unsigned getOpcode() const; 441   unsigned getOpcode()  const { return (unsigned short)NodeType; } 932 inline unsigned SDValue::getOpcode() const { 933   return Node->getOpcode();     [all...] | 
|   /external/smali/dexlib2/src/main/java/org/jf/dexlib2/writer/ | 
| InstructionWriter.java  | 99             writer.write(getOpcodeValue(instruction.getOpcode())); 108             writer.write(getOpcodeValue(instruction.getOpcode())); 117             writer.write(getOpcodeValue(instruction.getOpcode())); 126             writer.write(getOpcodeValue(instruction.getOpcode())); 135             writer.write(getOpcodeValue(instruction.getOpcode())); 144             writer.write(getOpcodeValue(instruction.getOpcode())); 154             writer.write(getOpcodeValue(instruction.getOpcode())); 164             writer.write(getOpcodeValue(instruction.getOpcode())); 174             writer.write(getOpcodeValue(instruction.getOpcode())); 184             writer.write(getOpcodeValue(instruction.getOpcode()));     [all...] | 
|   /dalvik/dexgen/src/com/android/dexgen/rop/code/ | 
| PlainInsn.java  | 91         return new PlainInsn(getOpcode(), getPosition(), 118             newRop = Rops.ropFor(getOpcode().getOpcode(), 135         return new PlainInsn(getOpcode(), getPosition(),
  | 
|   /dalvik/dx/src/com/android/dx/io/instructions/ | 
| ZeroRegisterDecodedInstruction.java  | 41                 getFormat(), getOpcode(), newIndex, getIndexType(),
  |