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    Searched refs:getOpcode (Results 226 - 250 of 865) sorted by null

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  /external/dexmaker/src/dx/java/com/android/dx/dex/code/
InsnFormat.java 57 String op = insn.getOpcode().getName();
489 int opcode = insn.getOpcode().getOpcode();
508 int opcode = insn.getOpcode().getOpcode();
  /external/llvm/lib/Target/AMDGPU/
SIFoldOperands.cpp 146 unsigned Opc = MI->getOpcode();
225 const MCInstrDesc &FoldDesc = TII->get(OpToFold.getParent()->getOpcode());
244 if (UseMI->getOpcode() == AMDGPU::COPY) {
263 if (UseMI->getOpcode() == AMDGPU::REG_SEQUENCE) {
318 if (!isSafeToFold(MI.getOpcode()))
AMDGPUISelDAGToDAG.cpp 213 if (Addr.getOpcode() == ISD::FrameIndex) {
221 } else if (Addr.getOpcode() == ISD::ADD) {
232 if (Addr.getOpcode() == ISD::TargetExternalSymbol ||
233 Addr.getOpcode() == ISD::TargetGlobalAddress) {
241 if (Addr.getOpcode() == ISD::TargetExternalSymbol ||
242 Addr.getOpcode() == ISD::TargetGlobalAddress) {
246 if (Addr.getOpcode() == ISD::FrameIndex) {
254 } else if (Addr.getOpcode() == ISD::ADD) {
285 CurDAG->MorphNodeTo(N, N->getOpcode(), N->getVTList(), Ops);
308 unsigned int Opc = N->getOpcode();
    [all...]
R600OptimizeVectorRegisters.cpp 68 assert(MI->getOpcode() == AMDGPU::REG_SEQUENCE);
134 if (TII->get(MI.getOpcode()).TSFlags & R600_InstFlag::TEX_INST)
136 switch (MI.getOpcode()) {
250 if (TII->get(MI.getOpcode()).TSFlags & R600_InstFlag::TEX_INST)
329 if (MI->getOpcode() != AMDGPU::REG_SEQUENCE) {
330 if (TII->get(MI->getOpcode()).TSFlags & R600_InstFlag::TEX_INST) {
AMDGPUMCInstLower.cpp 45 int MCOpcode = ST.getInstrInfo()->pseudoToMCOpcode(MI->getOpcode());
50 "a target-specific version: " + Twine(MI->getOpcode()));
  /external/smali/dexlib2/src/test/java/org/jf/dexlib2/builder/
PayloadAlignmentTest.java 63 Assert.assertEquals(instruction.getOpcode(), Opcode.ARRAY_PAYLOAD);
79 Assert.assertEquals(instruction.getOpcode(), Opcode.MOVE);
82 Assert.assertEquals(instruction.getOpcode(), Opcode.NOP);
85 Assert.assertEquals(instruction.getOpcode(), Opcode.ARRAY_PAYLOAD);
146 Assert.assertEquals(instructions.get(i).getOpcode(), expectedOpcodes[i]);
  /external/llvm/lib/Transforms/Scalar/
SeparateConstOffsetFromGEP.cpp 452 if (BO->getOpcode() != Instruction::Add &&
453 BO->getOpcode() != Instruction::Sub &&
454 BO->getOpcode() != Instruction::Or) {
461 if (BO->getOpcode() == Instruction::Or &&
476 if (BO->getOpcode() == Instruction::Add && !ZeroExtended && NonNegative) {
497 if (BO->getOpcode() == Instruction::Add ||
498 BO->getOpcode() == Instruction::Sub) {
525 if (BO->getOpcode() == Instruction::Sub)
578 Current = ConstantExpr::getCast((*I)->getOpcode(), C, (*I)->getType());
629 NewBO = BinaryOperator::Create(BO->getOpcode(), NextInChain, TheOther
    [all...]
  /external/llvm/lib/Target/X86/
X86FloatingPoint.cpp 790 int Opcode = Lookup(PopTable, I->getOpcode());
    [all...]
  /dalvik/dx/src/com/android/dx/ssa/
SCCP.java 241 Rop opcode = insn.getOpcode();
274 switch (opcode.getOpcode()) {
306 switch (opcode.getOpcode()) {
367 int opcode = insn.getOpcode().getOpcode();
471 if (ropInsn.getOpcode().getBranchingness() != Rop.BRANCH_NONE
472 || ropInsn.getOpcode().isCallLike()) {
476 int opcode = insn.getOpcode().getOpcode();
  /external/dexmaker/src/dx/java/com/android/dx/ssa/
SCCP.java 242 Rop opcode = insn.getOpcode();
275 switch (opcode.getOpcode()) {
307 switch (opcode.getOpcode()) {
368 int opcode = insn.getOpcode().getOpcode();
472 if (ropInsn.getOpcode().getBranchingness() != Rop.BRANCH_NONE
473 || ropInsn.getOpcode().isCallLike()) {
477 int opcode = insn.getOpcode().getOpcode();
  /external/llvm/lib/Target/PowerPC/
PPCCTRLoops.cpp 400 (J->getOpcode() == Instruction::UDiv ||
401 J->getOpcode() == Instruction::SDiv ||
402 J->getOpcode() == Instruction::URem ||
403 J->getOpcode() == Instruction::SRem)) {
407 (J->getOpcode() == Instruction::Shl ||
408 J->getOpcode() == Instruction::AShr ||
409 J->getOpcode() == Instruction::LShr)) {
625 unsigned Opc = I->getOpcode();
687 unsigned Opc = MII->getOpcode();
  /external/smali/dexlib2/src/main/java/org/jf/dexlib2/dexbacked/raw/
CodeItem.java 128 switch (instruction.getOpcode().format) {
253 out.annotate(2, instruction.getOpcode().name);
285 instruction.getOpcode().name, Joiner.on(", ").join(args), reference));
309 instruction.getOpcode().name, instruction.getRegisterFixedC(), Joiner.on(", ").join(args)));
317 instruction.getOpcode().name, formatRegister(startRegister), formatRegister(endRegister),
374 instruction.getOpcode().name, Joiner.on(", ").join(args));
381 out.annotate(2, instruction.getOpcode().name);
415 out.annotate(2, instruction.getOpcode().name);
437 out.annotate(2, instruction.getOpcode().name);
  /external/llvm/lib/Target/AArch64/
AArch64CollectLOH.cpp 299 bool IsADRP = MI.getOpcode() == AArch64::ADRP;
497 unsigned Opc = Def->getOpcode();
531 switch (Instr->getOpcode()) {
577 if ((ADRPMode && Def->getOpcode() != AArch64::ADRP) ||
648 switch (Instr->getOpcode()) {
673 switch (Instr->getOpcode()) {
700 if (Def->getOpcode() != AArch64::ADRP) {
723 if (Def->getOpcode() == AArch64::ADRP)
737 if (Use.getOpcode() != AArch64::ADDXri &&
738 (Use.getOpcode() != AArch64::LDRXui |
    [all...]
AArch64A53Fix835769.cpp 43 switch (MI->getOpcode()) {
60 switch (MI->getOpcode()) {
  /dalvik/dexgen/src/com/android/dexgen/dex/code/
OutputFinisher.java 369 result[i] = insns.get(i).getOpcode().getFormat();
496 Dop dop = insn.getOpcode();
545 Dop dop = insn.getOpcode();
578 Dop dop = insn.getOpcode();
598 originalFormat = insn.getOpcode().getFormat();
672 Dop dop = insn.getOpcode();
  /external/llvm/lib/CodeGen/SelectionDAG/
LegalizeIntegerTypes.cpp 45 switch (N->getOpcode()) {
183 SDValue Res = DAG.getAtomic(N->getOpcode(), SDLoc(N),
196 SDValue Res = DAG.getAtomic(N->getOpcode(), SDLoc(N),
210 assert(N->getOpcode() == ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS);
235 N->getOpcode(), SDLoc(N), N->getMemoryVT(), VTs, N->getChain(),
374 Op = DAG.getNode(N->getOpcode(), dl, NVT, Op);
393 if (N->getOpcode() == ISD::CTTZ) {
401 return DAG.getNode(N->getOpcode(), dl, NVT, Op);
413 unsigned NewOpc = N->getOpcode();
420 if (N->getOpcode() == ISD::FP_TO_UINT &
    [all...]
  /external/llvm/lib/Transforms/InstCombine/
InstCombineSelect.cpp 82 switch (I->getOpcode()) {
102 switch (I->getOpcode()) {
143 return CastInst::Create(Instruction::CastOps(TI->getOpcode()), NewSI,
186 return BinaryOperator::Create(BO->getOpcode(), MatchOp, NewSI);
188 return BinaryOperator::Create(BO->getOpcode(), NewSI, MatchOp);
232 BinaryOperator *BO = BinaryOperator::Create(TVI_BO->getOpcode(),
267 BinaryOperator *BO = BinaryOperator::Create(FVI_BO->getOpcode(),
    [all...]
  /external/llvm/lib/Target/ARM/
Thumb1FrameLowering.cpp 74 unsigned Opc = Old->getOpcode();
173 if (MBBI != MBB.end() && MBBI->getOpcode() == ARM::tPUSH) {
308 if (MI->getOpcode() == ARM::tLDRspi &&
312 else if (MI->getOpcode() == ARM::tPOP) {
378 if (MBBI != MBB.end() && MBBI->getOpcode() == ARM::tBX_RET &&
379 &MBB.front() != MBBI && std::prev(MBBI)->getOpcode() == ARM::tPOP) {
436 if (MBBI != MBB.end() && MBBI->getOpcode() != ARM::tB)
437 CanRestoreDirectly = (MBBI->getOpcode() == ARM::tBX_RET ||
438 MBBI->getOpcode() == ARM::tPOP_RET);
442 assert(MBBI_prev->getOpcode() == ARM::tPOP)
    [all...]
Thumb2SizeReduction.cpp 229 switch(Def->getOpcode()) {
289 if (Use->getOpcode() == ARM::t2MOVi ||
290 Use->getOpcode() == ARM::t2MOVi16)
341 unsigned Opc = MI->getOpcode();
547 unsigned Opc = MI->getOpcode();
661 if (MI->getOpcode() == ARM::t2MUL) {
844 if ((MCID.getOpcode() == ARM::t2RSBSri ||
845 MCID.getOpcode() == ARM::t2RSBri ||
846 MCID.getOpcode() == ARM::t2SXTB ||
847 MCID.getOpcode() == ARM::t2SXTH |
    [all...]
  /dalvik/dx/src/com/android/dx/ssa/back/
IdenticalBlockCombiner.java 80 || iBlock.getFirstInsn().getOpcode().getOpcode() ==
RegisterAllocator.java 116 return ndefInsn.getOpcode().getOpcode() == RegOps.MOVE_PARAM;
  /external/clang/lib/Analysis/
PseudoConstantAnalysis.cpp 103 switch (BO->getOpcode()) {
149 switch (UO->getOpcode()) {
  /external/dexmaker/src/dx/java/com/android/dx/ssa/back/
IdenticalBlockCombiner.java 85 || iBlock.getFirstInsn().getOpcode().getOpcode() ==
RegisterAllocator.java 118 return ndefInsn.getOpcode().getOpcode() == RegOps.MOVE_PARAM;
  /external/llvm/lib/IR/
ConstantsContext.h 184 return CE->getOpcode() == Instruction::ExtractValue;
217 return CE->getOpcode() == Instruction::InsertValue;
254 return CE->getOpcode() == Instruction::GetElementPtr;
283 return CE->getOpcode() == Instruction::ICmp ||
284 CE->getOpcode() == Instruction::FCmp;
465 : Opcode(CE->getOpcode()),
471 : Opcode(CE->getOpcode()),
488 if (Opcode != CE->getOpcode())

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