| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/all/ |
| itbl-test.c | 39 unsigned int insn; local
81 insn = itbl_assemble (name, p);
82 if (insn == 0)
87 printf ("line %d: insn(%s) = 0x%x)\n", aline, s, insn);
88 if (!itbl_disassemble (buf, insn))
90 "(0x%x)\n", aline, insn);
92 printf ("line %d: disasm(0x%x) = %s)\n", aline, insn, buf);
|
| /toolchain/binutils/binutils-2.25/opcodes/ |
| d30v-dis.c | 34 lookup_opcode (struct d30v_insn *insn, long num, int is_long)
66 insn->form = f;
71 if (insn->form)
75 if (insn->form)
80 if (insn->form == NULL)
83 insn->op = op;
84 insn->ecc = (num >> 28) & 0x7;
121 struct d30v_insn *insn,
129 (*info->fprintf_func) (info->stream, "%s", insn->op->name);
132 if (d30v_operand_table[insn->form->operands[0]].flags & OPERAND_NAME
327 struct d30v_insn insn; local
[all...] |
| i370-dis.c | 36 i370_insn_t insn; local
47 /* Cast the bytes into the insn (in a host-endian indep way). */
48 insn.i[0] = (buffer[0] << 24) & 0xff000000;
49 insn.i[0] |= (buffer[1] << 16) & 0xff0000;
50 insn.i[0] |= (buffer[2] << 8) & 0xff00;
51 insn.i[0] |= buffer[3] & 0xff;
52 insn.i[1] = (buffer[4] << 24) & 0xff000000;
53 insn.i[1] |= (buffer[5] << 16) & 0xff0000;
66 masked = insn;
86 insn.i[0] >>= 16
[all...] |
| cris-dis.c | 171 get_opcode_entry (unsigned int insn,
176 insn code. Each entry is initialized when found to be NULL. */
287 && prefix_opc_table[insn] != NULL)
288 max_matchedp = prefix_opc_table[insn];
289 else if (prefix_insn == NO_CRIS_PREFIX && opc_table[insn] != NULL)
290 max_matchedp = opc_table[insn];
362 if ((opcodep->match & insn) == opcodep->match
363 && (opcodep->lose & insn) == 0
366 insn,
392 opc_table[insn] = max_matchedp
1398 unsigned int insn; local
[all...] |
| tic30-dis.c | 33 #define GET_TYPE(insn) (insn & 0x80000000 ? insn & 0xC0000000 : insn & 0xE0000000)
72 get_tic30_instruction (unsigned long insn_word, struct instruction *insn)
79 insn->type = NORMAL_INSN;
91 insn->tm = current_optab;
97 insn->tm = current_optab;
106 insn->type = PARALLEL_INSN;
117 insn->ptm = current_optab
683 struct instruction insn = { 0, NULL, NULL }; local
[all...] |
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/arm/ |
| maverick.c | 50 /* This outputs the condition flag that may follow each ARM insn.
136 /* Convenience wrapper to define_insn, that prefixes every insn with
139 insname and insnvar specify the main insn name and a variant;
141 bit pattern that defines the insn, properly shifted, and funcs is a
143 insn. */
152 /* Define a single LDC/STC variant. op is the main insn opcode; ld
175 /* Produce the insn identifiers of all LDST variants of a given insn.
176 To be used in the initialization of an insn group array. */
178 insn (insname ## _p), insn (insname ## _pw), insn (insname
[all...] |
| /external/mesa3d/src/gallium/drivers/nv50/codegen/ |
| nv50_ir_bb.cpp | 235 BasicBlock::remove(Instruction *insn)
237 assert(insn->bb == this);
239 if (insn->prev)
240 insn->prev->next = insn->next;
242 if (insn->next)
243 insn->next->prev = insn->prev;
245 exit = insn->prev;
247 if (insn == entry)
478 Instruction *insn, *next; local
[all...] |
| /art/tools/dexfuzz/src/dexfuzz/program/mutators/ |
| FieldFlagChanger.java | 110 Instruction insn = fieldInsns.get(fieldInsnIdx).insn; local
111 ContainsPoolIndex containsPoolIndex = (ContainsPoolIndex) insn.info.format;
112 int fieldIdx = containsPoolIndex.getPoolIndex(insn);
136 Instruction insn = fieldInsns.get(mutation.fieldInsnIdx).insn; local
137 ContainsPoolIndex containsPoolIndex = (ContainsPoolIndex) insn.info.format;
138 int fieldIdx = containsPoolIndex.getPoolIndex(insn);
156 Opcode opcode = mInsn.insn.info.opcode;
158 Instruction insn = mInsn.insn local
[all...] |
| ConstantValueChanger.java | 82 if (mInsn.insn.info.format instanceof ContainsConst) {
91 if (mInsn.insn.info.format instanceof ContainsConst) {
109 long oldConstant = ((ContainsConst)constInsn.insn.info.format).getConst(constInsn.insn);
116 % ((ContainsConst)constInsn.insn.info.format).getConstRange();
136 long oldConstant = ((ContainsConst)constInsn.insn.info.format).getConst(constInsn.insn);
144 ((ContainsConst)constInsn.insn.info.format).setConst(constInsn.insn, mutation.newConstant);
|
| ValuePrinter.java | 90 if (insnOutputToPrint.insn.justRaw) {
154 valueCopyInsn.insn = new Instruction();
156 valueCopyInsn.insn.info = Instruction.getOpcodeInfo(Opcode.MOVE_OBJECT_16);
158 valueCopyInsn.insn.info = Instruction.getOpcodeInfo(Opcode.MOVE_WIDE_16);
160 valueCopyInsn.insn.info = Instruction.getOpcodeInfo(Opcode.MOVE_16);
162 valueCopyInsn.insn.vregB = insnOutputToPrint.insn.vregA;
163 valueCopyInsn.insn.vregA = valueRegister;
166 streamLoadInsn.insn = new Instruction();
167 streamLoadInsn.insn.info = Instruction.getOpcodeInfo(Opcode.SGET_OBJECT)
[all...] |
| VRegChanger.java | 85 if (mInsn.insn.info.format instanceof ContainsVRegs) {
99 if (mInsn.insn.info.format instanceof ContainsVRegs) {
116 int numVregs = ((ContainsVRegs)vregInsn.insn.info.format).getVRegCount();
126 oldVregValue = (int) vregInsn.insn.vregA;
129 oldVregValue = (int) vregInsn.insn.vregB;
132 oldVregValue = (int) vregInsn.insn.vregC;
170 oldVregValue = (int) vregInsn.insn.vregA;
171 vregInsn.insn.vregA = (long) mutation.newVregValue;
174 oldVregValue = (int) vregInsn.insn.vregB;
175 vregInsn.insn.vregB = (long) mutation.newVregValue
[all...] |
| /external/ltrace/sysdeps/linux-gnu/ppc/ |
| trace.c | 38 #include "insn.h"
68 int insn = local
72 if (insn == SYSCALL_INSN) {
104 uint32_t insn; member in union:__anon18441
109 } else if (proc_read_32(proc, ip, &u.insn) < 0) {
115 if ((u.insn & LWARX_MASK) != LWARX_INSTRUCTION
116 && (u.insn & LWARX_MASK) != LDARX_INSTRUCTION)
128 uint32_t insn;
130 insn = l >> 32;
132 insn = l
[all...] |
| /dalvik/dx/src/com/android/dx/ssa/ |
| MoveParamCombiner.java | 61 public void visitMoveInsn (NormalSsaInsn insn) {
65 public void visitNonMoveInsn (NormalSsaInsn insn) {
66 if (insn.getOpcode().getOpcode() != RegOps.MOVE_PARAM) {
70 int param = getParamIndex(insn);
73 paramSpecs[param] = insn.getResult();
76 final RegisterSpec specB = insn.getResult();
131 deletedInsns.add(insn);
141 * Returns the parameter index associated with a move-param insn. Does
142 * not verify that the insn is a move-param insn
[all...] |
| SCCP.java | 20 import com.android.dx.rop.code.Insn;
115 for (SsaInsn insn : ssaMeth.getUseListForRegister(reg)) {
116 varyingWorklist.add(insn);
119 for (SsaInsn insn : ssaMeth.getUseListForRegister(reg)) {
120 ssaWorklist.add(insn);
157 * @param insn PHI to simulate.
159 private void simulatePhi(PhiInsn insn) {
160 int phiResultReg = insn.getResult().getReg();
166 RegisterSpecList sources = insn.getSources();
172 int predBlockIndex = insn.predBlockIndexForSourcesIndex(i)
564 SsaInsn insn = varyingWorklist.remove(listSize); local
578 SsaInsn insn = ssaWorklist.remove(listSize); local
[all...] |
| /external/dexmaker/src/dx/java/com/android/dx/ssa/ |
| MoveParamCombiner.java | 63 public void visitMoveInsn (NormalSsaInsn insn) {
67 public void visitNonMoveInsn (NormalSsaInsn insn) {
68 if (insn.getOpcode().getOpcode() != RegOps.MOVE_PARAM) {
72 int param = getParamIndex(insn);
75 paramSpecs[param] = insn.getResult();
78 final RegisterSpec specB = insn.getResult();
133 deletedInsns.add(insn);
143 * Returns the parameter index associated with a move-param insn. Does
144 * not verify that the insn is a move-param insn
[all...] |
| SCCP.java | 20 import com.android.dx.rop.code.Insn;
116 for (SsaInsn insn : ssaMeth.getUseListForRegister(reg)) {
117 varyingWorklist.add(insn);
120 for (SsaInsn insn : ssaMeth.getUseListForRegister(reg)) {
121 ssaWorklist.add(insn);
158 * @param insn PHI to simulate.
160 private void simulatePhi(PhiInsn insn) {
161 int phiResultReg = insn.getResult().getReg();
167 RegisterSpecList sources = insn.getSources();
173 int predBlockIndex = insn.predBlockIndexForSourcesIndex(i)
565 SsaInsn insn = varyingWorklist.remove(listSize); local
579 SsaInsn insn = ssaWorklist.remove(listSize); local
[all...] |
| /toolchain/binutils/binutils-2.25/include/opcode/ |
| cgen.h | 65 /* Lots of cpu's have a fixed insn size, or one which rarely changes,
66 and it's generally easier to handle these by treating the insn as an
107 an object (ifield, hardware, operand, insn, whatever) and are specified
185 /* For each domain (ifld,hw,operand,insn), list of attributes. */
201 This is used by the assembler when it encounters an unknown insn. */
205 For non-LIW cpus this is generally the length of the smallest insn.
229 The result of parsing an insn is stored here.
230 To generate the actual insn, this is passed to the insert handler.
231 When printing an insn, the result of extraction is stored here.
232 To print the insn, this is passed to the print handler
1069 const CGEN_INSN *insn; member in struct:cgen_insn_list
[all...] |
| /external/mockito/cglib-and-asm/src/org/mockito/asm/tree/analysis/ |
| BasicInterpreter.java | 79 public Value newOperation(final AbstractInsnNode insn) {
80 switch (insn.getOpcode()) {
105 Object cst = ((LdcInsnNode) insn).cst;
122 return newValue(Type.getType(((FieldInsnNode) insn).desc));
124 return newValue(Type.getObjectType(((TypeInsnNode) insn).desc));
130 public Value copyOperation(final AbstractInsnNode insn, final Value value)
136 public Value unaryOperation(final AbstractInsnNode insn, final Value value)
139 switch (insn.getOpcode()) {
180 return newValue(Type.getType(((FieldInsnNode) insn).desc));
182 switch (((IntInsnNode) insn).operand) {
[all...] |
| /toolchain/binutils/binutils-2.25/gas/config/ |
| tc-tic54x.c | 86 char parmnemonic[MAX_LINE]; /* 2nd mnemonic of parallel insn. */
101 int words; /* Size of insn in 16-bit words. */
4843 static tic54x_insn insn; local
[all...] |
| tc-m32r.c | 44 const CGEN_INSN *insn; member in struct:__anon75194
63 /* prev_insn.insn is non-null if last insn was a 16 bit insn on a 32 bit
67 /* Non-zero if we've seen a relaxable insn since the last 32 bit
550 Internally, we need to output one of these each time a 32 bit insn is
551 seen after an insn that is relaxable. */
557 prev_insn.insn = NULL;
561 /* Record the symbol so that when we output the insn, we can create
757 const CGEN_OPINST *a_operands = CGEN_INSN_OPERANDS (a->insn);
1197 m32r_insn insn; local
1710 const CGEN_INSN *insn; local
2140 const CGEN_INSN *insn = NULL; local
[all...] |
| /dalvik/dexgen/src/com/android/dexgen/dex/code/form/ |
| Form35c.java | 51 public String insnArgString(DalvInsn insn) {
52 RegisterSpecList regs = explicitize(insn.getRegisters());
53 return regListString(regs) + ", " + cstString(insn);
58 public String insnCommentString(DalvInsn insn, boolean noteIndices) {
60 return cstComment(insn);
74 public boolean isCompatible(DalvInsn insn) {
75 if (!(insn instanceof CstInsn)) {
79 CstInsn ci = (CstInsn) insn;
104 public void writeTo(AnnotatedOutput out, DalvInsn insn) {
105 int cpi = ((CstInsn) insn).getIndex()
[all...] |
| Form3rc.java | 47 public String insnArgString(DalvInsn insn) {
48 RegisterSpecList regs = insn.getRegisters();
80 sb.append(cstString(insn));
87 public String insnCommentString(DalvInsn insn, boolean noteIndices) {
89 return cstComment(insn);
103 public boolean isCompatible(DalvInsn insn) {
104 if (!(insn instanceof CstInsn)) {
108 CstInsn ci = (CstInsn) insn;
154 public void writeTo(AnnotatedOutput out, DalvInsn insn) {
155 RegisterSpecList regs = insn.getRegisters()
[all...] |
| /dalvik/dx/src/com/android/dx/rop/code/ |
| Insn.java | 30 public abstract class Insn implements ToHuman {
51 public Insn(Rop opcode, SourcePosition position, RegisterSpec result,
225 public abstract Insn withAddedCatch(Type type);
234 public abstract Insn withRegisterOffset(int delta);
238 * possible, the insn is converted into a version in which a source
245 public Insn withSourceLiteral() {
250 * Returns an exact copy of this Insn
254 public Insn copy() {
271 * Compares Insn contents, since {@code Insn.equals()} is define
[all...] |
| /external/dexmaker/src/dx/java/com/android/dx/rop/code/ |
| Insn.java | 30 public abstract class Insn implements ToHuman {
51 public Insn(Rop opcode, SourcePosition position, RegisterSpec result,
225 public abstract Insn withAddedCatch(Type type);
234 public abstract Insn withRegisterOffset(int delta);
238 * possible, the insn is converted into a version in which a source
245 public Insn withSourceLiteral() {
250 * Returns an exact copy of this Insn
254 public Insn copy() {
271 * Compares Insn contents, since {@code Insn.equals()} is define
[all...] |
| /dalvik/dx/src/com/android/dx/dex/code/ |
| HighRegisterPrefix.java | 60 for (SimpleInsn insn : insns) {
61 result += insn.codeSize();
72 for (SimpleInsn insn : insns) {
73 insn.writeTo(out);
119 SimpleInsn insn = moveInsnFor(src, outAt); local
125 sb.append(insn.listingString0(noteIndices));
|
