| /toolchain/binutils/binutils-2.25/ld/testsuite/ld-aarch64/ |
| tls-relax-ie-le.d | 5 +10000: d53bd041 mrs x1, tpidr_el0
|
| tlsle-symbol-offset.d | 8 +10000: d53bd040 mrs x0, tpidr_el0
|
| tls-relax-gdesc-ie.s | 11 mrs x1, tpidr_el0
|
| tls-relax-gdesc-le.s | 10 mrs x1, tpidr_el0
|
| tls-relax-ie-le-3.s | 7 mrs x2, tpidr_el0
|
| tlsle-symbol-offset.s | 14 mrs x0, tpidr_el0
|
| tls-relax-all.s | 22 mrs x1, tpidr_el0
30 mrs x2, tpidr_el0
46 mrs x2, tpidr_el0
|
| tls-relax-gdesc-ie-2.s | 20 mrs x1, tpidr_el0
|
| tls-relax-gdesc-le-2.s | 19 mrs x1, tpidr_el0
|
| tls-relax-ie-le-2.s | 7 mrs x1, tpidr_el0
|
| tls-desc-ie.s | 24 mrs x1, tpidr_el0
27 mrs x2, tpidr_el0
|
| tls-relax-gdesc-ie-2.d | 16 +1002c: d53bd041 mrs x1, tpidr_el0
|
| tls-relax-gdesc-le-2.d | 16 +1002c: d53bd041 mrs x1, tpidr_el0
|
| tls-relax-ie-le-2.d | 5 +10000: d53bd041 mrs x1, tpidr_el0
|
| tls-desc-ie.d | 13 +10020: d53bd041 mrs x1, tpidr_el0
15 +10028: d53bd042 mrs x2, tpidr_el0
|
| /external/llvm/test/MC/AArch64/ |
| armv8.1a-lor.s | 29 mrs x0, LORID_EL1
34 // CHECK: mrs x0, LORID_EL1 // encoding: [0xe0,0xa4,0x38,0xd5]
46 mrs LORID_EL1, #0
78 // CHECK-ERROR: mrs LORID_EL1, #0
|
| trace-regs-diagnostics.s | 3 mrs x12, trcoslar
4 mrs x10, trclar
6 // CHECK-NEXT: mrs x12, trcoslar
9 // CHECK-NEXT: mrs x10, trclar
|
| /bionic/libc/arch-arm64/bionic/ |
| vfork.S | 35 mrs x0, tpidr_el0
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/aarch64/ |
| msr.d | 15 1c: d53b4220 mrs x0, daif
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/arm/ |
| mrs-msr-thumb-v7-m-bad.l | 2 [^:]*:5: Error: selected processor does not support requested special purpose register -- `mrs r4,cpsr'
3 [^:]*:6: Error: selected processor does not support requested special purpose register -- `mrs r5,spsr'
|
| archv6m.d | 9 0[0-9a-f]+ <[^>]+> f3ef 8201 mrs r2, IAPSR
|
| thumb-w-good.d | 9 00000004 <.text\+0x4> f3ef 8000 mrs r0, CPSR
|
| /external/opencv3/modules/cudastereo/src/ |
| stereobp.cpp | 66 void level_up_messages_gpu(int dst_idx, int dst_cols, int dst_rows, int src_rows, PtrStepSzb* mus, PtrStepSzb* mds, PtrStepSzb* mls, PtrStepSzb* mrs, cudaStream_t stream);
292 typedef void (*level_up_messages_t)(int dst_idx, int dst_cols, int dst_rows, int src_rows, PtrStepSzb* mus, PtrStepSzb* mds, PtrStepSzb* mls, PtrStepSzb* mrs, cudaStream_t stream);
326 PtrStepSzb mrs[] = {r_, r2_};
335 level_up_messages_callers[funcIdx](mem_idx, cols_all_[i], rows_all_[i], rows_all_[i+1], mus, mds, mls, mrs, stream);
337 calc_all_iterations_callers[funcIdx](cols_all_[i], rows_all_[i], iters_, mus[mem_idx], mds[mem_idx], mls[mem_idx], mrs[mem_idx], datas_[i], stream);
|
| /bionic/libc/arch-arm64/denver64/bionic/ |
| memset.S | 207 mrs tmp1, dczid_el0
219 mrs tmp1, dczid_el0
|
| /bionic/libc/arch-arm64/generic/bionic/ |
| memset.S | 180 mrs tmp1, dczid_el0
192 mrs tmp1, dczid_el0
|
