| /hardware/bsp/intel/peripheral/libupm/src/mma7455/ |
| mma7455.cxx | 119 if (xyz.reg.x_msb & 0x02) {
120 xyz.reg.x_msb |= 0xFC;
123 if (xyz.reg.y_msb & 0x02) {
124 xyz.reg.y_msb |= 0xFC;
127 if (xyz.reg.z_msb & 0x02) {
128 xyz.reg.z_msb |= 0xFC;
148 MMA7455::i2cReadReg (unsigned char reg, uint8_t *buffer, int len) {
155 if (mraa::SUCCESS != m_i2ControlCtx.writeByte(reg)) {
165 MMA7455::i2cWriteReg (unsigned char reg, uint8_t *buffer, int len) {
169 data[0] = reg;
[all...] |
| /dalvik/dexgen/src/com/android/dexgen/dex/code/form/ |
| Form31c.java | 77 RegisterSpec reg; local
81 reg = regs.get(0);
89 reg = regs.get(0);
90 if (reg.getReg() != regs.get(1).getReg()) {
100 if (!unsignedFitsInByte(reg.getReg())) {
|
| /external/clang/test/CodeGen/ |
| builtins-systemz.c | 12 void test_htm1(struct __htm_tdb *tdb, int reg, int *mem, uint64_t *mem64) {
66 __builtin_tabort (reg);
80 __builtin_non_tx_store (mem64, (uint64_t)reg);
90 __builtin_non_tx_store (&g, reg);
101 __builtin_tx_assist (reg);
|
| /hardware/qcom/msm8960/kernel-headers/linux/mfd/ |
| msm-adie-codec.h | 39 #define ADIE_CODEC_PACK_ENTRY(reg, mask, val) ((val)|(mask << 8)|(reg << 16))
40 #define ADIE_CODEC_UNPACK_ENTRY(packed, reg, mask, val) do { ((reg) = ((packed >> 16) & (0xff))); ((mask) = ((packed >> 8) & (0xff))); ((val) = ((packed) & (0xff))); } while (0);
61 u8 reg; member in struct:adie_codec_register
|
| /hardware/qcom/msm8994/kernel-headers/linux/mfd/ |
| msm-adie-codec.h | 39 #define ADIE_CODEC_PACK_ENTRY(reg, mask, val) ((val)|(mask << 8)|(reg << 16))
40 #define ADIE_CODEC_UNPACK_ENTRY(packed, reg, mask, val) do { ((reg) = ((packed >> 16) & (0xff))); ((mask) = ((packed >> 8) & (0xff))); ((val) = ((packed) & (0xff))); } while (0);
61 u8 reg; member in struct:adie_codec_register
|
| /hardware/qcom/msm8996/kernel-headers/linux/mfd/ |
| msm-adie-codec.h | 39 #define ADIE_CODEC_PACK_ENTRY(reg,mask,val) ((val) | (mask << 8) | (reg << 16))
40 #define ADIE_CODEC_UNPACK_ENTRY(packed,reg,mask,val) do { ((reg) = ((packed >> 16) & (0xff))); ((mask) = ((packed >> 8) & (0xff))); ((val) = ((packed) & (0xff))); } while(0);
61 u8 reg; member in struct:adie_codec_register
|
| /hardware/qcom/msm8x26/kernel-headers/linux/mfd/ |
| msm-adie-codec.h | 39 #define ADIE_CODEC_PACK_ENTRY(reg, mask, val) ((val)|(mask << 8)|(reg << 16))
40 #define ADIE_CODEC_UNPACK_ENTRY(packed, reg, mask, val) do { ((reg) = ((packed >> 16) & (0xff))); ((mask) = ((packed >> 8) & (0xff))); ((val) = ((packed) & (0xff))); } while (0);
61 u8 reg; member in struct:adie_codec_register
|
| /hardware/qcom/msm8x84/kernel-headers/linux/mfd/ |
| msm-adie-codec.h | 39 #define ADIE_CODEC_PACK_ENTRY(reg, mask, val) ((val)|(mask << 8)|(reg << 16))
40 #define ADIE_CODEC_UNPACK_ENTRY(packed, reg, mask, val) do { ((reg) = ((packed >> 16) & (0xff))); ((mask) = ((packed >> 8) & (0xff))); ((val) = ((packed) & (0xff))); } while (0);
61 u8 reg; member in struct:adie_codec_register
|
| /dalvik/dexgen/src/com/android/dexgen/dex/file/ |
| DebugInfoDecoder.java | 56 /** indexed by register, the last local variable live in a reg */
153 public int reg; field in class:DebugInfoDecoder.LocalEntry
164 public LocalEntry(int address, boolean isStart, int reg, int nameIndex,
168 this.reg = reg;
176 address, isStart ? "start" : "end", reg,
294 int reg = readUnsignedLeb128(bs); local
298 address, true, reg, nameIdx, typeIdx, 0);
301 lastEntryForReg[reg] = le;
306 int reg = readUnsignedLeb128(bs) local
319 int reg = readUnsignedLeb128(bs); local
345 int reg = readUnsignedLeb128(bs); local
[all...] |
| /dalvik/dx/src/com/android/dx/dex/file/ |
| DebugInfoDecoder.java | 67 /** indexed by register, the last local variable live in a reg */
164 public int reg; field in class:DebugInfoDecoder.LocalEntry
175 public LocalEntry(int address, boolean isStart, int reg, int nameIndex,
179 this.reg = reg;
187 address, isStart ? "start" : "end", reg,
298 int reg = Leb128.readUnsignedLeb128(bs); local
302 address, true, reg, nameIdx, typeIdx, 0);
305 lastEntryForReg[reg] = le;
310 int reg = Leb128.readUnsignedLeb128(bs) local
323 int reg = Leb128.readUnsignedLeb128(bs); local
349 int reg = Leb128.readUnsignedLeb128(bs); local
[all...] |
| /external/dexmaker/src/dx/java/com/android/dx/dex/file/ |
| DebugInfoDecoder.java | 57 /** indexed by register, the last local variable live in a reg */
154 public int reg; field in class:DebugInfoDecoder.LocalEntry
165 public LocalEntry(int address, boolean isStart, int reg, int nameIndex,
169 this.reg = reg;
177 address, isStart ? "start" : "end", reg,
288 int reg = Leb128Utils.readUnsignedLeb128(bs); local
292 address, true, reg, nameIdx, typeIdx, 0);
295 lastEntryForReg[reg] = le;
300 int reg = Leb128Utils.readUnsignedLeb128(bs) local
313 int reg = Leb128Utils.readUnsignedLeb128(bs); local
339 int reg = Leb128Utils.readUnsignedLeb128(bs); local
[all...] |
| /dalvik/dexgen/src/com/android/dexgen/rop/code/ |
| RegisterSpecSet.java | 33 * {@code null} or is an instance whose {@code reg}
163 * @param reg {@code >= 0;} the desired register number
167 public RegisterSpec get(int reg) {
169 return specs[reg];
172 throw new IllegalArgumentException("bogus reg");
201 for (int reg = 0; reg < length; reg++) {
202 RegisterSpec s = specs[reg];
226 for (int reg = 0; reg < length; reg++)
273 int reg = spec.getReg(); local
[all...] |
| /dalvik/dx/src/com/android/dx/rop/code/ |
| RegisterSpecSet.java | 32 * {@code null} or is an instance whose {@code reg}
162 * @param reg {@code >= 0;} the desired register number
166 public RegisterSpec get(int reg) {
168 return specs[reg];
171 throw new IllegalArgumentException("bogus reg");
200 for (int reg = 0; reg < length; reg++) {
201 RegisterSpec s = specs[reg];
225 for (int reg = 0; reg < length; reg++)
272 int reg = spec.getReg(); local
[all...] |
| /external/dexmaker/src/dx/java/com/android/dx/rop/code/ |
| RegisterSpecSet.java | 32 * {@code null} or is an instance whose {@code reg}
162 * @param reg {@code >= 0;} the desired register number
166 public RegisterSpec get(int reg) {
168 return specs[reg];
171 throw new IllegalArgumentException("bogus reg");
200 for (int reg = 0; reg < length; reg++) {
201 RegisterSpec s = specs[reg];
225 for (int reg = 0; reg < length; reg++)
272 int reg = spec.getReg(); local
[all...] |
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/ia64/ |
| unwind-ok.d | 14 [[:space:]]*P3:rp_br\(reg=b7\)
17 [[:space:]]*X2:spill_reg\(t=0,reg=r4,treg=r2\)
18 [[:space:]]*X4:spill_reg_p\(qp=p1,t=1,reg=r7,treg=r31\)
19 [[:space:]]*X1:spill_sprel\(reg=b1,t=2,spoff=0x8\)
20 [[:space:]]*X3:spill_sprel_p\(qp=p2,t=3,reg=b5,spoff=0x10\)
21 [[:space:]]*X1:spill_psprel\(reg=f2,t=4,pspoff=0x10-0x28\)
22 [[:space:]]*X3:spill_psprel_p\(qp=p4,t=5,reg=f5,pspoff=0x10-0x30\)
23 [[:space:]]*X2:restore\(t=6,reg=f16\)
24 [[:space:]]*X4:restore_p\(qp=p8,t=7,reg=f31\)
25 [[:space:]]*X2:spill_reg\(t=8,reg=ar\.bsp,treg=r16\
[all...] |
| /frameworks/native/include/private/ui/ |
| RegionHelper.h | 198 void advance(region& reg, TYPE& aTop, TYPE& aBottom) {
200 size_t count = reg.count;
201 RECT const * rects = reg.rects;
209 aTop = rects->top + reg.dy;
210 aBottom = rects->bottom + reg.dy;
215 reg.rects = rects;
216 reg.count = count;
279 void advance(region& reg, TYPE& left, TYPE& right) {
280 if (reg.rects && reg.count)
[all...] |
| /art/compiler/utils/x86_64/ |
| assembler_x86_64.h | 97 bool IsRegister(CpuRegister reg) const {
99 && ((encoding_[0] & 0x07) == reg.LowBits()) // Register codes match.
100 && (reg.NeedsRex() == ((rex_ & 1) != 0)); // REX.000B bits match.
156 explicit Operand(CpuRegister reg) : rex_(0), length_(0), fixup_(nullptr) { SetModRM(3, reg); }
343 void call(CpuRegister reg);
347 void pushq(CpuRegister reg);
351 void popq(CpuRegister reg);
507 void xchgl(CpuRegister reg, const Address& address);
511 void cmpl(CpuRegister reg, const Immediate& imm)
[all...] |
| /art/compiler/utils/mips/ |
| managed_register_mips.h | 45 std::ostream& operator<<(std::ostream& os, const RegisterPair& reg);
211 MipsManagedRegister reg(reg_id);
212 CHECK(reg.IsValidManagedRegister());
213 return reg;
217 std::ostream& operator<<(std::ostream& os, const MipsManagedRegister& reg);
222 mips::MipsManagedRegister reg(id_);
223 CHECK(reg.IsNoRegister() || reg.IsValidManagedRegister());
224 return reg;
|
| /art/compiler/utils/x86/ |
| managed_register_x86.h | 46 std::ostream& operator<<(std::ostream& os, const RegisterPair& reg);
208 X86ManagedRegister reg(reg_id);
209 CHECK(reg.IsValidManagedRegister());
210 return reg;
214 std::ostream& operator<<(std::ostream& os, const X86ManagedRegister& reg);
219 x86::X86ManagedRegister reg(id_);
220 CHECK(reg.IsNoRegister() || reg.IsValidManagedRegister());
221 return reg;
|
| /bionic/libc/arch-x86/bionic/ |
| setjmp.S | 60 .macro m_mangle_registers reg
61 xorl \reg,%edx
62 xorl \reg,%ebx
63 xorl \reg,%esp
64 xorl \reg,%ebp
65 xorl \reg,%esi
66 xorl \reg,%edi
69 .macro m_unmangle_registers reg
70 m_mangle_registers \reg
|
| /dalvik/dx/src/com/android/dx/ssa/back/ |
| RegisterAllocator.java | 76 * @param reg register
79 protected final int getCategoryForSsaReg(int reg) {
80 SsaInsn definition = ssaMeth.getDefinitionForRegister(reg);
83 // an undefined reg
93 * @param reg {@code >= 0;} SSA register
97 protected final RegisterSpec getDefinitionSpecForSsaReg(int reg) {
98 SsaInsn definition = ssaMeth.getDefinitionForRegister(reg);
107 * @param reg register in question
110 protected boolean isDefinitionMoveParam(int reg) {
111 SsaInsn defInsn = ssaMeth.getDefinitionForRegister(reg);
[all...] |
| /development/perftests/panorama/feature_mos/src/mosaic/ |
| AlignFeatures.cpp | 52 return reg.profile_string;
80 if (!reg.Initialized())
82 reg.Init(width, height, motion_model_type, 20, linear_polish, quarter_res,
92 if (reg.Initialized())
113 reg.AddFrame(m_rows, Hcurr, true); // Force this to be a reference frame
114 int num_corner_ref = reg.GetNrRefCorners();
123 reg.AddFrame(m_rows, Hcurr, false);
136 int num_inliers = reg.GetNrInliers();
181 reg.UpdateReference(m_rows,quarter_res,false);
|
| /external/dexmaker/src/dx/java/com/android/dx/ssa/back/ |
| RegisterAllocator.java | 78 * @param reg register
81 protected final int getCategoryForSsaReg(int reg) {
82 SsaInsn definition = ssaMeth.getDefinitionForRegister(reg);
85 // an undefined reg
95 * @param reg {@code >= 0;} SSA register
99 protected final RegisterSpec getDefinitionSpecForSsaReg(int reg) {
100 SsaInsn definition = ssaMeth.getDefinitionForRegister(reg);
109 * @param reg register in question
112 protected boolean isDefinitionMoveParam(int reg) {
113 SsaInsn defInsn = ssaMeth.getDefinitionForRegister(reg);
[all...] |
| /external/mesa3d/src/gallium/drivers/r300/compiler/ |
| r300_fragprog_swizzle.c | 107 static int r300_swizzle_is_native(rc_opcode opcode, struct rc_src_register reg)
117 if (reg.Abs || reg.Negate)
121 unsigned int swz = GET_SWZ(reg.Swizzle, j);
134 if (GET_SWZ(reg.Swizzle, j) != RC_SWIZZLE_UNUSED)
137 if ((reg.Negate & relevant) && ((reg.Negate & relevant) != relevant))
140 sd = lookup_native_swizzle(reg.Swizzle);
141 if (!sd || (reg.File == RC_FILE_PRESUB && sd->srcp_stride == 0))
|
| /external/vixl/examples/ |
| custom-disassembler.cc | 38 const CPURegister& reg) {
40 if (reg.IsRegister()) {
41 switch (reg.code()) {
43 AppendToOutput(reg.Is64Bits() ? "ip0" : "wip0");
46 AppendToOutput(reg.Is64Bits() ? "ip1" : "wip1");
49 AppendToOutput(reg.Is64Bits() ? "lr" : "w30");
52 AppendToOutput(reg.Is64Bits() ? "x_stack_pointer" : "w_stack_pointer");
55 AppendToOutput(reg.Is64Bits() ? "x_zero_reg" : "w_zero_reg");
63 Disassembler::AppendRegisterNameToOutput(instr, reg);
|
