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  /external/mesa3d/src/mesa/drivers/dri/i965/
brw_fs_schedule_instructions.cpp 280 add_dep(last_grf_write[inst->src[i].reg], n);
308 add_dep(last_grf_write[inst->dst.reg], n);
309 last_grf_write[inst->dst.reg] = n;
311 int reg = inst->dst.reg & ~BRW_MRF_COMPR4; local
313 add_dep(last_mrf_write[reg], n);
314 last_mrf_write[reg] = n;
316 if (inst->dst.reg & BRW_MRF_COMPR4)
317 reg += 4;
319 reg++
395 int reg = inst->dst.reg & ~BRW_MRF_COMPR4; local
    [all...]
  /external/pcre/dist/sljit/
sljitNativePPC_64.c 41 #define PUSH_RLDICR(reg, shift) \
42 push_inst(compiler, RLDI(reg, reg, 63 - shift, shift, 1))
44 static sljit_si load_immediate(struct sljit_compiler *compiler, sljit_si reg, sljit_sw imm)
52 return push_inst(compiler, ADDI | D(reg) | A(0) | IMM(imm));
55 return push_inst(compiler, ORI | S(TMP_ZERO) | A(reg) | IMM(imm));
58 FAIL_IF(push_inst(compiler, ADDIS | D(reg) | A(0) | IMM(imm >> 16)));
59 return (imm & 0xffff) ? push_inst(compiler, ORI | S(reg) | A(reg) | IMM(imm)) : SLJIT_SUCCESS;
70 FAIL_IF(push_inst(compiler, ADDI | D(reg) | A(0) | IMM(tmp >> 48)))
    [all...]
  /external/mesa3d/src/gallium/drivers/nv50/codegen/
nv50_ir_peephole.cpp 43 if (defExists(0) && def(0).rep()->reg.data.id < 0) {
45 if (def(d).rep()->reg.data.id >= 0)
70 if (getDef(d)->refCount() || getDef(d)->reg.data.id >= 0)
106 if (mov->getDef(0)->reg.data.id < 0 && si && si->op != OP_PHI) {
320 switch (imm.reg.type) {
323 imm.reg.data.f32 = fabsf(imm.reg.data.f32);
325 imm.reg.data.f32 = -imm.reg.data.f32;
327 if (imm.reg.data.f32 < 0.0f
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nv50_ir_inlines.h 135 return value ? value->reg.file : FILE_NULL;
140 return value ? value->reg.size : 0;
157 return value ? value->reg.file : FILE_NULL;
162 return value ? value->reg.size : 0;
194 if (reg.data.id < 0) {
307 if (reg.file >= FILE_GPR && reg.file <= FILE_ADDRESS)
314 if (reg.file >= FILE_MEMORY_CONST)
321 if (reg.file >= FILE_MEMORY_CONST)
328 reg.data.offset = offset
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nv50_ir_ra.cpp 44 bool assign(int32_t& reg, DataFile f, unsigned int size);
45 void release(DataFile f, int32_t reg, unsigned int size);
46 bool occupy(DataFile f, int32_t reg, unsigned int size);
48 void occupyMask(DataFile f, int32_t reg, uint8_t mask);
66 return v->reg.data.id * MIN2(v->reg.size, 4);
70 return units(v->reg.file, idToBytes(v));
74 if (v->reg.size < 4)
75 return units(v->reg.file, bytes);
148 RegisterSet::assign(int32_t& reg, DataFile f, unsigned int size
647 int32_t reg; member in class:nv50_ir::GCRA::RIG_Node
789 Value *reg = reinterpret_cast<Value *>(it.get())->asLValue(); local
1611 unsigned int reg = regs.idToBytes(split->getSrc(0)); local
1625 unsigned int reg = regs.idToBytes(merge->getDef(0)); local
    [all...]
  /art/compiler/utils/x86_64/
assembler_x86_64.cc 27 std::ostream& operator<<(std::ostream& os, const CpuRegister& reg) {
28 return os << reg.AsRegister();
31 std::ostream& operator<<(std::ostream& os, const XmmRegister& reg) {
32 return os << reg.AsFloatRegister();
35 std::ostream& operator<<(std::ostream& os, const X87Register& reg) {
36 return os << "ST" << static_cast<int>(reg);
39 void X86_64Assembler::call(CpuRegister reg) {
41 EmitOptionalRex32(reg);
43 EmitRegisterOperand(2, reg.LowBits());
63 void X86_64Assembler::pushq(CpuRegister reg) {
2907 X86_64ManagedRegister reg = mreg.AsX86_64(); local
2918 X86_64ManagedRegister reg = mreg.AsX86_64(); local
    [all...]
  /external/mesa3d/src/gallium/drivers/r600/
r600_pipe.h 697 static INLINE void r600_store_config_reg_seq(struct r600_command_buffer *cb, unsigned reg, unsigned num)
699 assert(reg < R600_CONTEXT_REG_OFFSET);
702 cb->buf[cb->atom.num_dw++] = (reg - R600_CONFIG_REG_OFFSET) >> 2;
709 static INLINE void r600_store_context_reg_seq(struct r600_command_buffer *cb, unsigned reg, unsigned num)
711 assert(reg >= R600_CONTEXT_REG_OFFSET && reg < R600_CTL_CONST_OFFSET);
714 cb->buf[cb->atom.num_dw++] = (reg - R600_CONTEXT_REG_OFFSET) >> 2;
721 static INLINE void r600_store_ctl_const_seq(struct r600_command_buffer *cb, unsigned reg, unsigned num)
723 assert(reg >= R600_CTL_CONST_OFFSET);
726 cb->buf[cb->atom.num_dw++] = (reg - R600_CTL_CONST_OFFSET) >> 2
    [all...]
  /external/v8/src/regexp/
regexp-macro-assembler-tracer.cc 117 void RegExpMacroAssemblerTracer::AdvanceRegister(int reg, int by) {
118 PrintF(" AdvanceRegister(register=%d, by=%d);\n", reg, by);
119 assembler_->AdvanceRegister(reg, by);
135 void RegExpMacroAssemblerTracer::WriteCurrentPositionToRegister(int reg,
138 reg,
140 assembler_->WriteCurrentPositionToRegister(reg, cp_offset);
150 void RegExpMacroAssemblerTracer::ReadCurrentPositionFromRegister(int reg) {
151 PrintF(" ReadCurrentPositionFromRegister(register=%d);\n", reg);
152 assembler_->ReadCurrentPositionFromRegister(reg);
156 void RegExpMacroAssemblerTracer::WriteStackPointerToRegister(int reg) {
    [all...]
regexp-macro-assembler-irregexp.h 49 virtual void AdvanceRegister(int reg, int by); // r[reg] += by.
52 virtual void WriteCurrentPositionToRegister(int reg, int cp_offset);
54 virtual void ReadCurrentPositionFromRegister(int reg);
55 virtual void WriteStackPointerToRegister(int reg);
56 virtual void ReadStackPointerFromRegister(int reg);
  /external/v8/src/interpreter/
bytecode-register-optimizer.cc 18 RegisterInfo(Register reg, uint32_t equivalence_id, bool materialized)
19 : register_(reg),
38 // materialized and not register |reg|. The materialized equivalent
41 RegisterInfo* GetMaterializedEquivalentOtherThan(Register reg);
137 Register reg) {
140 if (visitor->materialized() && visitor->register_value() != reg) {
460 Register reg(start.index() + i);
461 RegisterInfo* reg_info = GetOrCreateRegisterInfo(reg);
467 Register reg) {
471 RegisterInfo* reg_info = GetOrCreateRegisterInfo(reg);
528 Register reg = Register::FromOperand(static_cast<int32_t>(operands[i])); local
    [all...]
  /dalvik/dexgen/src/com/android/dexgen/dex/code/form/
Form21c.java 77 RegisterSpec reg; local
81 reg = regs.get(0);
89 reg = regs.get(0);
90 if (reg.getReg() != regs.get(1).getReg()) {
100 if (!unsignedFitsInByte(reg.getReg())) {
  /dalvik/dx/src/com/android/dx/dex/code/form/
Form21c.java 78 RegisterSpec reg; local
82 reg = regs.get(0);
90 reg = regs.get(0);
91 if (reg.getReg() != regs.get(1).getReg()) {
101 if (!unsignedFitsInByte(reg.getReg())) {
Form31c.java 78 RegisterSpec reg; local
82 reg = regs.get(0);
90 reg = regs.get(0);
91 if (reg.getReg() != regs.get(1).getReg()) {
101 if (!unsignedFitsInByte(reg.getReg())) {
  /external/dexmaker/src/dx/java/com/android/dx/dex/code/form/
Form21c.java 79 RegisterSpec reg; local
83 reg = regs.get(0);
91 reg = regs.get(0);
92 if (reg.getReg() != regs.get(1).getReg()) {
102 if (!unsignedFitsInByte(reg.getReg())) {
Form31c.java 79 RegisterSpec reg; local
83 reg = regs.get(0);
91 reg = regs.get(0);
92 if (reg.getReg() != regs.get(1).getReg()) {
102 if (!unsignedFitsInByte(reg.getReg())) {
Form41c.java 82 RegisterSpec reg; local
86 reg = regs.get(0);
94 reg = regs.get(0);
95 if (reg.getReg() != regs.get(1).getReg()) {
105 if (!unsignedFitsInShort(reg.getReg())) {
  /hardware/qcom/msm8960/original-kernel-headers/linux/mfd/
msm-adie-codec.h 51 #define ADIE_CODEC_PACK_ENTRY(reg, mask, val) ((val)|(mask << 8)|(reg << 16))
53 #define ADIE_CODEC_UNPACK_ENTRY(packed, reg, mask, val) \
55 ((reg) = ((packed >> 16) & (0xff))); \
82 u8 reg; member in struct:adie_codec_register
  /hardware/qcom/msm8994/original-kernel-headers/linux/mfd/
msm-adie-codec.h 51 #define ADIE_CODEC_PACK_ENTRY(reg, mask, val) ((val)|(mask << 8)|(reg << 16))
53 #define ADIE_CODEC_UNPACK_ENTRY(packed, reg, mask, val) \
55 ((reg) = ((packed >> 16) & (0xff))); \
82 u8 reg; member in struct:adie_codec_register
  /hardware/qcom/msm8996/original-kernel-headers/linux/mfd/
msm-adie-codec.h 51 #define ADIE_CODEC_PACK_ENTRY(reg, mask, val) ((val)|(mask << 8)|(reg << 16))
53 #define ADIE_CODEC_UNPACK_ENTRY(packed, reg, mask, val) \
55 ((reg) = ((packed >> 16) & (0xff))); \
82 u8 reg; member in struct:adie_codec_register
  /hardware/qcom/msm8x26/original-kernel-headers/linux/mfd/
msm-adie-codec.h 51 #define ADIE_CODEC_PACK_ENTRY(reg, mask, val) ((val)|(mask << 8)|(reg << 16))
53 #define ADIE_CODEC_UNPACK_ENTRY(packed, reg, mask, val) \
55 ((reg) = ((packed >> 16) & (0xff))); \
82 u8 reg; member in struct:adie_codec_register
  /hardware/qcom/msm8x84/original-kernel-headers/linux/mfd/
msm-adie-codec.h 51 #define ADIE_CODEC_PACK_ENTRY(reg, mask, val) ((val)|(mask << 8)|(reg << 16))
53 #define ADIE_CODEC_UNPACK_ENTRY(packed, reg, mask, val) \
55 ((reg) = ((packed >> 16) & (0xff))); \
82 u8 reg; member in struct:adie_codec_register
  /system/core/debuggerd/arm/
machine.cpp 40 for (int reg = 0; reg < 14; reg++) {
41 dump_memory(log, backtrace, regs.uregs[reg], "memory near %.2s:", &reg_names[reg * 2]);
  /system/core/debuggerd/arm64/
machine.cpp 44 for (int reg = 0; reg < 31; reg++) {
45 dump_memory(log, backtrace, regs.regs[reg], "memory near x%d:", reg);
  /toolchain/binutils/binutils-2.25/gas/config/
tc-msp430.c 1100 op->reg = 0; /* Reg PC. */
1157 op->reg = 3;
1164 op->reg = 3;
1171 op->reg = 3;
1178 op->reg = 3;
1194 op->reg = 2;
1211 op->reg = 2;
2354 int reg; local
2419 int reg; local
2481 int reg; local
2540 int reg; local
2687 int reg; local
    [all...]
  /external/libunwind/src/aarch64/
Gresume.c 138 int reg; local
142 for (reg = 0; reg <= UNW_AARCH64_PSTATE; ++reg)
144 Debug (16, "copying %s %d\n", unw_regname (reg), reg);
145 if (unw_is_fpreg (reg))
147 if (tdep_access_fpreg (c, reg, &fpval, 0) >= 0)
148 as->acc.access_fpreg (as, reg, &fpval, 1, arg);
152 if (tdep_access_reg (c, reg, &val, 0) >= 0
    [all...]

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