| /prebuilts/ndk/current/platforms/android-3/arch-arm/usr/include/asm/arch/ |
| mux.h | 18 #define MUX_REG(reg, mode_offset, mode) .mux_reg = FUNC_MUX_CTRL_##reg, .mask_offset = mode_offset, .mask = mode,
20 #define PULL_REG(reg, bit, status) .pull_reg = PULL_DWN_CTRL_##reg, .pull_bit = bit, .pull_val = status,
22 #define PU_PD_REG(reg, status) .pu_pd_reg = PU_PD_SEL_##reg, .pu_pd_val = status,
24 #define MUX_REG_730(reg, mode_offset, mode) .mux_reg = OMAP730_IO_CONF_##reg, .mask_offset = mode_offset, .mask = mode,
26 #define PULL_REG_730(reg, bit, status) .pull_reg = OMAP730_IO_CONF_##reg, .pull_bit = bit, .pull_val = status
[all...] |
| /prebuilts/ndk/current/platforms/android-4/arch-arm/usr/include/asm/arch/ |
| mux.h | 18 #define MUX_REG(reg, mode_offset, mode) .mux_reg = FUNC_MUX_CTRL_##reg, .mask_offset = mode_offset, .mask = mode,
20 #define PULL_REG(reg, bit, status) .pull_reg = PULL_DWN_CTRL_##reg, .pull_bit = bit, .pull_val = status,
22 #define PU_PD_REG(reg, status) .pu_pd_reg = PU_PD_SEL_##reg, .pu_pd_val = status,
24 #define MUX_REG_730(reg, mode_offset, mode) .mux_reg = OMAP730_IO_CONF_##reg, .mask_offset = mode_offset, .mask = mode,
26 #define PULL_REG_730(reg, bit, status) .pull_reg = OMAP730_IO_CONF_##reg, .pull_bit = bit, .pull_val = status
[all...] |
| /prebuilts/ndk/current/platforms/android-5/arch-arm/usr/include/asm/arch/ |
| mux.h | 18 #define MUX_REG(reg, mode_offset, mode) .mux_reg = FUNC_MUX_CTRL_##reg, .mask_offset = mode_offset, .mask = mode,
20 #define PULL_REG(reg, bit, status) .pull_reg = PULL_DWN_CTRL_##reg, .pull_bit = bit, .pull_val = status,
22 #define PU_PD_REG(reg, status) .pu_pd_reg = PU_PD_SEL_##reg, .pu_pd_val = status,
24 #define MUX_REG_730(reg, mode_offset, mode) .mux_reg = OMAP730_IO_CONF_##reg, .mask_offset = mode_offset, .mask = mode,
26 #define PULL_REG_730(reg, bit, status) .pull_reg = OMAP730_IO_CONF_##reg, .pull_bit = bit, .pull_val = status
[all...] |
| /prebuilts/ndk/current/platforms/android-8/arch-arm/usr/include/asm/arch/ |
| mux.h | 18 #define MUX_REG(reg, mode_offset, mode) .mux_reg = FUNC_MUX_CTRL_##reg, .mask_offset = mode_offset, .mask = mode,
20 #define PULL_REG(reg, bit, status) .pull_reg = PULL_DWN_CTRL_##reg, .pull_bit = bit, .pull_val = status,
22 #define PU_PD_REG(reg, status) .pu_pd_reg = PU_PD_SEL_##reg, .pu_pd_val = status,
24 #define MUX_REG_730(reg, mode_offset, mode) .mux_reg = OMAP730_IO_CONF_##reg, .mask_offset = mode_offset, .mask = mode,
26 #define PULL_REG_730(reg, bit, status) .pull_reg = OMAP730_IO_CONF_##reg, .pull_bit = bit, .pull_val = status
[all...] |
| /prebuilts/ndk/current/platforms/android-9/arch-arm/usr/include/asm/arch/ |
| mux.h | 18 #define MUX_REG(reg, mode_offset, mode) .mux_reg = FUNC_MUX_CTRL_##reg, .mask_offset = mode_offset, .mask = mode,
20 #define PULL_REG(reg, bit, status) .pull_reg = PULL_DWN_CTRL_##reg, .pull_bit = bit, .pull_val = status,
22 #define PU_PD_REG(reg, status) .pu_pd_reg = PU_PD_SEL_##reg, .pu_pd_val = status,
24 #define MUX_REG_730(reg, mode_offset, mode) .mux_reg = OMAP730_IO_CONF_##reg, .mask_offset = mode_offset, .mask = mode,
26 #define PULL_REG_730(reg, bit, status) .pull_reg = OMAP730_IO_CONF_##reg, .pull_bit = bit, .pull_val = status
[all...] |
| /external/mesa3d/src/gallium/auxiliary/gallivm/ |
| lp_bld_tgsi.c | 288 const struct tgsi_full_src_register *reg = &inst->Src[src_op]; local
296 swizzle = tgsi_util_get_full_src_register_swizzle(reg, chan_index);
303 assert(reg->Register.Index <= bld_base->info->file_max[reg->Register.File]);
305 if (bld_base->emit_fetch_funcs[reg->Register.File]) {
306 res = bld_base->emit_fetch_funcs[reg->Register.File](bld_base, reg, stype,
313 if (reg->Register.Absolute) {
317 if (reg->Register.Negate) {
327 reg->Register.SwizzleX
[all...] |
| /toolchain/binutils/binutils-2.25/gas/config/ |
| tc-tic4x.c | 1674 int reg; local
[all...] |
| /art/compiler/utils/arm64/ |
| assembler_arm64.cc | 486 Arm64ManagedRegister reg = mreg.AsArm64(); local
488 CHECK(reg.IsWRegister()) << reg;
490 ___ Sxtb(reg_w(reg.AsWRegister()), reg_w(reg.AsWRegister()));
492 ___ Sxth(reg_w(reg.AsWRegister()), reg_w(reg.AsWRegister()));
497 Arm64ManagedRegister reg = mreg.AsArm64(); local
499 CHECK(reg.IsWRegister()) << reg;
693 Arm64ManagedRegister reg = r.AsArm64(); local
722 Arm64ManagedRegister reg = entry_spills.at(i).AsArm64(); local
749 Arm64ManagedRegister reg = r.AsArm64(); local
[all...] |
| /external/opencv3/modules/imgproc/src/ |
| lsd.cpp | 319 * @param reg Return: Vector of points, that are part of the region
324 void region_grow(const Point2i& s, std::vector<RegionPoint>& reg,
330 * @param reg The region of points, from which the rectangle to be constructed from.
337 void region2rect(const std::vector<RegionPoint>& reg, const int reg_size, const double reg_angle,
344 double get_theta(const std::vector<RegionPoint>& reg, const int& reg_size, const double& x,
353 bool refine(std::vector<RegionPoint>& reg, int& reg_size, double reg_angle,
360 bool reduce_region_radius(std::vector<RegionPoint>& reg, int& reg_size, double reg_angle,
472 std::vector<RegionPoint> reg(img_width * img_height);
483 region_grow(list[i].p, reg, reg_size, reg_angle, prec);
490 region2rect(reg, reg_size, reg_angle, prec, p, rec)
815 region_grow(Point(reg[0].x, reg[0].y), reg, reg_size, reg_angle, tau); local
[all...] |
| /external/mesa3d/src/mesa/drivers/dri/i965/ |
| brw_fs_copy_propagation.cpp | 38 inst->src[arg].reg != entry->dst.reg ||
56 inst->src[arg].reg = entry->src.reg;
115 (inst->src[0].reg != inst->dst.reg ||
|
| /external/tcpdump/ |
| print-mpcp.c | 131 const struct mpcp_reg_t *reg; member in union:__anon23022
225 mpcp.reg = (const struct mpcp_reg_t *)tptr;
228 EXTRACT_16BITS(mpcp.reg->assigned_port),
229 bittok2str(mpcp_reg_flag_values, "Reserved", mpcp.reg->flags),
230 EXTRACT_16BITS(mpcp.reg->sync_time),
231 mpcp.reg->echoed_pending_grants));
|
| /external/v8/src/interpreter/ |
| bytecode-register-allocator.cc | 131 bool TemporaryRegisterAllocator::RegisterIsLive(Register reg) const {
133 DCHECK(reg >= first_temporary_register() &&
134 reg <= last_temporary_register());
135 return free_temporaries_.find(reg.index()) == free_temporaries_.end();
183 Register reg) const {
185 if (*i == reg.index()) return true;
|
| /external/v8/test/cctest/ |
| test-code-stubs-arm.cc | 83 Register reg = Register::from_code(reg_num); local
84 if (!reg.is(destination_reg)) {
85 __ push(reg);
113 Register reg = Register::from_code(reg_num); local
114 if (!reg.is(destination_reg)) {
116 __ cmp(reg, ip);
|
| /system/core/libpixelflinger/codeflinger/ |
| GGLAssembler.h | 34 #define CONTEXT_ADDR_LOAD(REG, FIELD) \
35 ADDR_LDR(AL, REG, mBuilderContext.Rctx, immed12_pre(GGL_OFFSETOF(FIELD)))
37 #define CONTEXT_ADDR_STORE(REG, FIELD) \
38 ADDR_STR(AL, REG, mBuilderContext.Rctx, immed12_pre(GGL_OFFSETOF(FIELD)))
40 #define CONTEXT_LOAD(REG, FIELD) \
41 LDR(AL, REG, mBuilderContext.Rctx, immed12_pre(GGL_OFFSETOF(FIELD)))
43 #define CONTEXT_STORE(REG, FIELD) \
44 STR(AL, REG, mBuilderContext.Rctx, immed12_pre(GGL_OFFSETOF(FIELD)))
54 int reserveReg(int reg);
56 void recycleReg(int reg);
111 int reg = mRegFile.obtain(); local
143 int reg = 31 - __builtin_clz(mRegList); local
155 int reg = 31 - __builtin_clz(mRegList); local
215 int reg; member in struct:android::GGLAssembler::reg_t
[all...] |
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/cr16/ |
| loadb_test.s | 5 # loadb abs20/24 reg
16 # loadb abs20 rel reg
31 # loadb rbase(disp20/-disp20) reg
44 # loadb rpbase(disp4/disp16/disp20/-disp20) reg
61 # loadb rbase(disp0/disp14) rel reg
68 # loadb rpbase(disp20) rel reg
|
| loadw_test.s | 5 # loadw abs20/24 reg
16 # loadw abs20 rel reg
31 # loadw rbase(disp20/-disp20) reg
44 # loadw rpbase(disp4/disp16/disp20/-disp20) reg
61 # loadw rbase(disp0/disp14) rel reg
68 # loadw rpbase(disp20) rel reg
|
| /art/compiler/debug/dwarf/ |
| dwarf_test.cc | 42 const Reg reg(6);
60 opcodes.DefCFA(reg, offset);
62 opcodes.DefCFA(reg, -offset);
64 opcodes.DefCFARegister(reg);
73 opcodes.Undefined(reg);
75 opcodes.SameValue(reg);
77 opcodes.Offset(Reg(0x3F), -offset);
81 opcodes.Offset(Reg(0x40), -offset);
83 opcodes.Offset(Reg(0x40), offset)
[all...] |
| /art/compiler/utils/x86_64/ |
| constants_x86_64.h | 46 std::ostream& operator<<(std::ostream& os, const CpuRegister& reg);
64 std::ostream& operator<<(std::ostream& os, const XmmRegister& reg);
78 std::ostream& operator<<(std::ostream& os, const X87Register& reg);
|
| /external/clang/test/CodeGen/ |
| sparcv9-abi.c | 64 struct reg { struct
69 struct reg f_reg(struct reg x) {
|
| /external/dexmaker/src/dx/java/com/android/dx/ssa/back/ |
| InterferenceGraph.java | 80 sb.append("Reg " + i + ":" + interference.get(i).toString());
89 * @param reg {@code >= 0;} register
93 public void mergeInterferenceSet(int reg, IntSet set) {
94 if (reg < interference.size()) {
95 set.merge(interference.get(reg));
|
| /hardware/bsp/intel/peripheral/libupm/src/tcs3414cs/ |
| tcs3414cs.h | 161 uint16_t i2cReadReg_N (int reg, unsigned int len, uint8_t * buffer);
162 mraa::Result i2cWriteReg_N (uint8_t reg, unsigned int len, uint8_t * buffer);
163 mraa::Result i2cWriteReg (uint8_t reg, uint8_t data);
|
| /art/compiler/utils/arm/ |
| managed_register_arm.h | 39 std::ostream& operator<<(std::ostream& os, const RegisterPair& reg);
257 ArmManagedRegister reg(reg_id);
258 CHECK(reg.IsValidManagedRegister());
259 return reg;
263 std::ostream& operator<<(std::ostream& os, const ArmManagedRegister& reg);
268 arm::ArmManagedRegister reg(id_);
269 CHECK(reg.IsNoRegister() || reg.IsValidManagedRegister());
270 return reg;
|
| /development/perftests/panorama/feature_mos/src/mosaic/ |
| AlignFeatures.h | 74 db_FrameToReferenceRegistration reg; member in class:Align
|
| /external/google-breakpad/src/third_party/libdisasm/ |
| ia32_reg.h | 38 void ia32_handle_register( x86_reg_t *reg, size_t id );
|
| /external/libnfc-nci/src/nfa/int/ |
| nfa_sys_int.h | 46 tNFA_SYS_REG *reg[NFA_ID_MAX]; /* registration structures */ member in struct:__anon15813
|
