/toolchain/binutils/binutils-2.25/gas/testsuite/gas/ia64/ |
regs.pl | 100 @regs = ( "rsc", "bsp", "bspstore", "rnat", "ccv", "unat", "fpsr", "itc", 102 foreach $i (@regs) { 122 @regs = ( "dcr", "itm", "iva", "pta", "ipsr", "isr", "iip", 127 # push @regs, "ida", "idtr", "iitr" 128 foreach $i (@regs) { 142 @regs = ("pmc", "pmd", "pkr", "rr", "ibr", "dbr", "CPUID", "cpuid"); 144 # push @regs, "itr", "dtr"; 145 foreach $i (@regs) {
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/dalvik/dx/src/com/android/dx/dex/code/form/ |
Form35c.java | 53 RegisterSpecList regs = explicitize(insn.getRegisters()); local 54 return regListString(regs) + ", " + cstString(insn); 93 RegisterSpecList regs = ci.getRegisters(); local 94 return (wordCount(regs) >= 0); 100 RegisterSpecList regs = insn.getRegisters(); local 101 int sz = regs.size(); 105 RegisterSpec reg = regs.get(i); 123 RegisterSpecList regs = explicitize(insn.getRegisters()); local 124 int sz = regs.size(); 125 int r0 = (sz > 0) ? regs.get(0).getReg() : 0 [all...] |
Form11n.java | 47 RegisterSpecList regs = insn.getRegisters(); local 50 return regs.get(0).regString() + ", " + literalBitsString(value); 69 RegisterSpecList regs = insn.getRegisters(); local 72 (regs.size() == 1) && 73 unsignedFitsInNibble(regs.get(0).getReg()))) { 92 RegisterSpecList regs = insn.getRegisters(); local 95 bits.set(0, unsignedFitsInNibble(regs.get(0).getReg())); 102 RegisterSpecList regs = insn.getRegisters(); local 107 opcodeUnit(insn, makeByte(regs.get(0).getReg(), value & 0xf)));
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Form21s.java | 47 RegisterSpecList regs = insn.getRegisters(); local 50 return regs.get(0).regString() + ", " + literalBitsString(value); 69 RegisterSpecList regs = insn.getRegisters(); local 71 (regs.size() == 1) && 72 unsignedFitsInByte(regs.get(0).getReg()))) { 91 RegisterSpecList regs = insn.getRegisters(); local 94 bits.set(0, unsignedFitsInByte(regs.get(0).getReg())); 101 RegisterSpecList regs = insn.getRegisters(); local 106 opcodeUnit(insn, regs.get(0).getReg()),
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/external/dexmaker/src/dx/java/com/android/dx/dex/code/form/ |
Form35c.java | 54 RegisterSpecList regs = explicitize(insn.getRegisters()); local 55 return regListString(regs) + ", " + cstString(insn); 94 RegisterSpecList regs = ci.getRegisters(); local 95 return (wordCount(regs) >= 0); 101 RegisterSpecList regs = insn.getRegisters(); local 102 int sz = regs.size(); 106 RegisterSpec reg = regs.get(i); 124 RegisterSpecList regs = explicitize(insn.getRegisters()); local 125 int sz = regs.size(); 126 int r0 = (sz > 0) ? regs.get(0).getReg() : 0 [all...] |
/external/valgrind/coregrind/m_coredump/ |
coredump-elf.c | 217 struct vki_user_regs_struct *regs; local 235 regs = (struct vki_user_regs_struct *)&(prs->pr_reg); 237 regs = (struct vki_user_regs_struct *)prs->pr_reg; 238 vg_assert(sizeof(*regs) == sizeof(prs->pr_reg)); 242 regs->eflags = LibVEX_GuestX86_get_eflags( &arch->vex ); 243 regs->esp = arch->vex.guest_ESP; 244 regs->eip = arch->vex.guest_EIP; 246 regs->ebx = arch->vex.guest_EBX; 247 regs->ecx = arch->vex.guest_ECX; 248 regs->edx = arch->vex.guest_EDX [all...] |
/external/valgrind/coregrind/m_sigframe/ |
sigframe-s390x-linux.c | 147 sigregs->regs.gprs[0] = tst->arch.vex.guest_r0; 148 sigregs->regs.gprs[1] = tst->arch.vex.guest_r1; 149 sigregs->regs.gprs[2] = tst->arch.vex.guest_r2; 150 sigregs->regs.gprs[3] = tst->arch.vex.guest_r3; 151 sigregs->regs.gprs[4] = tst->arch.vex.guest_r4; 152 sigregs->regs.gprs[5] = tst->arch.vex.guest_r5; 153 sigregs->regs.gprs[6] = tst->arch.vex.guest_r6; 154 sigregs->regs.gprs[7] = tst->arch.vex.guest_r7; 155 sigregs->regs.gprs[8] = tst->arch.vex.guest_r8; 156 sigregs->regs.gprs[9] = tst->arch.vex.guest_r9 [all...] |
/external/valgrind/VEX/test/ |
mmxtest.c | 119 #define mmx_r2r(op, regs, regd) \ 122 __asm__ __volatile__ ("movq %%" #regs ", %0" \ 125 fprintf(stderr, #op "_r2r(" #regs "=0x%016llx, ", mmx_trace.q); \ 130 __asm__ __volatile__ (#op " %" #regs ", %" #regd); \ 168 #define mmx_r2r(op, regs, regd) \ 169 __asm__ __volatile__ (#op " %" #regs ", %" #regd) 187 #define movq_r2r(regs, regd) mmx_r2r(movq, regs, regd) 202 #define movd_r2r(regs, regd) mmx_r2r(movd, regs, regd [all...] |
/cts/tools/vm-tests-tf/src/dot/junit/opcodes/neg_float/d/ |
T_neg_float_5.d | 7 .limit regs 1 14 .limit regs 5
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/cts/tools/vm-tests-tf/src/dot/junit/opcodes/neg_int/d/ |
T_neg_int_6.d | 7 .limit regs 1 14 .limit regs 5
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/external/google-breakpad/src/client/linux/dump_writer_common/ |
thread_info.h | 55 user_regs_struct regs; member in struct:google_breakpad::ThreadInfo 65 struct user_regs regs; member in struct:google_breakpad::ThreadInfo 69 struct user_pt_regs regs; member in struct:google_breakpad::ThreadInfo 72 user_regs_struct regs; member in struct:google_breakpad::ThreadInfo
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/system/core/libbacktrace/ |
UnwindCurrent.cpp | 47 unw_context->regs[0] = ucontext->uc_mcontext.arm_r0; 48 unw_context->regs[1] = ucontext->uc_mcontext.arm_r1; 49 unw_context->regs[2] = ucontext->uc_mcontext.arm_r2; 50 unw_context->regs[3] = ucontext->uc_mcontext.arm_r3; 51 unw_context->regs[4] = ucontext->uc_mcontext.arm_r4; 52 unw_context->regs[5] = ucontext->uc_mcontext.arm_r5; 53 unw_context->regs[6] = ucontext->uc_mcontext.arm_r6; 54 unw_context->regs[7] = ucontext->uc_mcontext.arm_r7; 55 unw_context->regs[8] = ucontext->uc_mcontext.arm_r8; 56 unw_context->regs[9] = ucontext->uc_mcontext.arm_r9 [all...] |
/dalvik/dexgen/src/com/android/dexgen/dex/code/form/ |
Form21h.java | 46 RegisterSpecList regs = insn.getRegisters(); local 49 return regs.get(0).regString() + ", " + literalBitsString(value); 55 RegisterSpecList regs = insn.getRegisters(); local 60 (regs.get(0).getCategory() == 1) ? 32 : 64); 72 RegisterSpecList regs = insn.getRegisters(); local 74 (regs.size() == 1) && 75 unsignedFitsInByte(regs.get(0).getReg()))) { 89 if (regs.get(0).getCategory() == 1) { 107 RegisterSpecList regs = insn.getRegisters(); local 112 if (regs.get(0).getCategory() == 1) [all...] |
Form35c.java | 52 RegisterSpecList regs = explicitize(insn.getRegisters()); local 53 return regListString(regs) + ", " + cstString(insn); 92 RegisterSpecList regs = ci.getRegisters(); local 93 return (wordCount(regs) >= 0); 106 RegisterSpecList regs = explicitize(insn.getRegisters()); local 107 int sz = regs.size(); 108 int r0 = (sz > 0) ? regs.get(0).getReg() : 0; 109 int r1 = (sz > 1) ? regs.get(1).getReg() : 0; 110 int r2 = (sz > 2) ? regs.get(2).getReg() : 0; 111 int r3 = (sz > 3) ? regs.get(3).getReg() : 0 [all...] |
Form11n.java | 46 RegisterSpecList regs = insn.getRegisters(); local 49 return regs.get(0).regString() + ", " + literalBitsString(value); 68 RegisterSpecList regs = insn.getRegisters(); local 71 (regs.size() == 1) && 72 unsignedFitsInNibble(regs.get(0).getReg()))) { 97 RegisterSpecList regs = insn.getRegisters(); local 102 opcodeUnit(insn, makeByte(regs.get(0).getReg(), value & 0xf)));
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Form21s.java | 46 RegisterSpecList regs = insn.getRegisters(); local 49 return regs.get(0).regString() + ", " + literalBitsString(value); 68 RegisterSpecList regs = insn.getRegisters(); local 70 (regs.size() == 1) && 71 unsignedFitsInByte(regs.get(0).getReg()))) { 96 RegisterSpecList regs = insn.getRegisters(); local 101 opcodeUnit(insn, regs.get(0).getReg()),
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Form31i.java | 46 RegisterSpecList regs = insn.getRegisters(); local 49 return regs.get(0).regString() + ", " + literalBitsString(value); 68 RegisterSpecList regs = insn.getRegisters(); local 70 (regs.size() == 1) && 71 unsignedFitsInByte(regs.get(0).getReg()))) { 94 RegisterSpecList regs = insn.getRegisters(); local 99 opcodeUnit(insn, regs.get(0).getReg()),
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Form51l.java | 47 RegisterSpecList regs = insn.getRegisters(); local 50 return regs.get(0).regString() + ", " + literalBitsString(value); 69 RegisterSpecList regs = insn.getRegisters(); local 71 (regs.size() == 1) && 72 unsignedFitsInByte(regs.get(0).getReg()))) { 91 RegisterSpecList regs = insn.getRegisters(); local 96 opcodeUnit(insn, regs.get(0).getReg()),
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Form3rc.java | 48 RegisterSpecList regs = insn.getRegisters(); local 49 int size = regs.size(); 60 sb.append(regs.get(0).regString()); 64 RegisterSpec lastReg = regs.get(size - 1); 73 sb.append(regs.get(0).regString()); 121 RegisterSpecList regs = ci.getRegisters(); local 122 int sz = regs.size(); 128 int first = regs.get(0).getReg(); 136 RegisterSpec one = regs.get(i); 155 RegisterSpecList regs = insn.getRegisters() local [all...] |
Form21c.java | 49 RegisterSpecList regs = insn.getRegisters(); local 50 return regs.get(0).regString() + ", " + cstString(insn); 76 RegisterSpecList regs = insn.getRegisters(); local 79 switch (regs.size()) { 81 reg = regs.get(0); 89 reg = regs.get(0); 90 if (reg.getReg() != regs.get(1).getReg()) { 126 RegisterSpecList regs = insn.getRegisters(); local 130 opcodeUnit(insn, regs.get(0).getReg()),
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/external/elfutils/backends/ |
sparc_initreg.c | 59 struct pt_regs regs; 60 if (ptrace (PTRACE_GETREGS, tid, ®s, 0) == -1) 64 if (!setfunc (-1, 1, (Dwarf_Word *) ®s.tpc, arg)) 71 if (!setfunc (1, 7, (Dwarf_Word *) ®s.u_regs[0], arg)) 75 if (!setfunc (8, 8, (Dwarf_Word *) ®s.u_regs[7], arg)) 83 Dwarf_Word sp = regs.u_regs[13];
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/external/ltrace/sysdeps/linux-gnu/aarch64/ |
trace.c | 37 int aarch64_read_gregs(struct process *proc, struct user_pt_regs *regs); 51 struct user_pt_regs regs; local 52 if (aarch64_read_gregs(proc, ®s) < 0) { 61 regs.pc - 4, 0); 71 *sysnum = regs.regs[8];
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/device/google/contexthub/firmware/src/platform/stm32f4xx/ |
spi.c | 96 struct StmSpi *regs; member in struct:StmSpiCfg 143 struct StmSpi *regs = pdev->cfg->regs; local 158 mode.periphAddr = (uintptr_t)®s->DR; 169 struct StmSpi *regs = pdev->cfg->regs; local 197 regs->CR1 &= ~SPI_CR1_BR_MASK; 198 regs->CR1 |= SPI_CR1_BR(div); 202 regs->CR1 &= ~SPI_CR1_CPOL; 204 regs->CR1 |= SPI_CR1_CPOL 268 struct StmSpi *regs = pdev->cfg->regs; local 274 struct StmSpi *regs = pdev->cfg->regs; local 296 struct StmSpi *regs = pdev->cfg->regs; local 311 struct StmSpi *regs = pdev->cfg->regs; local 327 struct StmSpi *regs = pdev->cfg->regs; local 402 struct StmSpi *regs = pdev->cfg->regs; local 418 struct StmSpi *regs = pdev->cfg->regs; local 500 struct StmSpi *regs = pdev->cfg->regs; local 513 struct StmSpi *regs = pdev->cfg->regs; local [all...] |
i2c.c | 166 struct StmI2c *regs; member in struct:StmI2cCfg 190 .regs = (struct StmI2c *)I2C1_BASE, 198 .regs = (struct StmI2c *)I2C2_BASE, 206 .regs = (struct StmI2c *)I2C3_BASE, 251 pdev->cfg->regs->CR1 |= I2C_CR1_ACK; 256 pdev->cfg->regs->CR1 &= ~I2C_CR1_ACK; 261 pdev->cfg->regs->CR2 |= I2C_CR2_DMAEN; 266 pdev->cfg->regs->CR2 &= ~I2C_CR2_DMAEN; 271 struct StmI2c *regs = pdev->cfg->regs; local 280 struct StmI2c *regs = pdev->cfg->regs; local 312 struct StmI2c *regs = pdev->cfg->regs; local 389 struct StmI2c *regs = pdev->cfg->regs; local 407 struct StmI2c *regs = pdev->cfg->regs; local 423 struct StmI2c *regs = pdev->cfg->regs; local 438 struct StmI2c *regs = pdev->cfg->regs; local 473 struct StmI2c *regs = pdev->cfg->regs; local 539 struct StmI2c *regs = pdev->cfg->regs; local 587 struct StmI2c *regs = pdev->cfg->regs; local 609 struct StmI2c *regs = pdev->cfg->regs; local 626 struct StmI2c *regs = pdev->cfg->regs; local 649 struct StmI2c *regs = pdev->cfg->regs; local 671 struct StmI2c *regs = pdev->cfg->regs; local 680 struct StmI2c *regs = pdev->cfg->regs; local 689 struct StmI2c *regs = pdev->cfg->regs; local 701 struct StmI2c *regs = pdev->cfg->regs; local 730 struct StmI2c *regs = pdev->cfg->regs; local [all...] |
/external/valgrind/none/tests/s390x/ |
clcl.c | 31 clcl_regs regs; local 46 regs.r1 = a1; 47 regs.r1p1 = l1; 48 regs.r2 = a2; 49 regs.r2p1 = l2; 50 regs.cc = cc; 52 return regs; 56 result_from_regs(clcl_regs regs) 60 result.addr1 = regs.r1; 61 result.len1 = regs.r1p1 & 0xFFFFFF 77 clcl_regs regs; local [all...] |