HomeSort by relevance Sort by last modified time
    Searched refs:rotr (Results 26 - 50 of 100) sorted by null

12 3 4

  /external/llvm/test/MC/Mips/
set-mips-directives-bad.s 21 rotr $2,15 # CHECK: error: instruction requires a CPU feature not currently enabled
mips-alu-instructions.s 19 # CHECK: rotr $9, $6, 7 # encoding: [0xc2,0x49,0x26,0x00]
50 rotr $9, $6, 7
mips64-alu-instructions.s 17 # CHECK: rotr $9, $6, 7 # encoding: [0xc2,0x49,0x26,0x00]
45 rotr $9, $6, 7
  /toolchain/binutils/binutils-2.25/gas/testsuite/gas/nds32/
alu-1.d 17 0+001c <[^>]*> rotr \$r0, \$r1, \$r2
  /external/llvm/unittests/ADT/
APIntTest.cpp 172 EXPECT_EQ(one, one.rotr(0));
173 EXPECT_EQ(one, one.rotr(1));
784 EXPECT_EQ(APInt(8, 16), APInt(8, 16).rotr(0));
785 EXPECT_EQ(APInt(8, 8), APInt(8, 16).rotr(1));
786 EXPECT_EQ(APInt(8, 4), APInt(8, 16).rotr(2));
787 EXPECT_EQ(APInt(8, 1), APInt(8, 16).rotr(4));
788 EXPECT_EQ(APInt(8, 16), APInt(8, 16).rotr(8));
790 EXPECT_EQ(APInt(8, 1), APInt(8, 1).rotr(0));
791 EXPECT_EQ(APInt(8, 128), APInt(8, 1).rotr(1));
792 EXPECT_EQ(APInt(8, 64), APInt(8, 1).rotr(2))
    [all...]
  /external/boringssl/src/crypto/sha/asm/
sha1-586.pl 167 &rotr($b,2); # b=ROTATE(b,30)
194 &rotr($b,$n==16?2:7); # b=ROTATE(b,30)
211 &rotr($b,2); # b=ROTATE(b,30)
236 &rotr($b,7); # b=ROTATE(b,30)
244 &rotr($a,5) if ($n==79);
254 &rotr($b,2); # b=ROTATE(b,30)
279 &rotr($b,7); # b=ROTATE(b,30)
298 &rotr($b,2); # b=ROTATE(b,30)
    [all...]
  /toolchain/binutils/binutils-2.25/gas/testsuite/gas/ia64/
pound.l 34 [[:space:]]*[[:digit:]]+[[:space:]]+\.rotr r#\[2\], r1#\[4\]
  /bionic/libc/arch-mips/string/
strcmp.S 146 rotr t0, t0, 16
  /external/boringssl/src/crypto/perlasm/
x86asm.pl 65 sub ::rotr { &ror(@_); }
  /external/llvm/test/MC/Mips/mips2/
invalid-mips32r2.s 60 rotr $1,15 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
61 rotr $1,$14,15 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
  /external/llvm/test/MC/Mips/mips32r2/
valid.s 165 rotr $1,15 # CHECK: rotr $1, $1, 15 # encoding: [0x00,0x21,0x0b,0xc2]
166 rotr $1,$14,15 # CHECK: rotr $1, $14, 15 # encoding: [0x00,0x2e,0x0b,0xc2]
  /external/llvm/test/MC/Mips/mips32r3/
valid.s 165 rotr $1,15 # CHECK: rotr $1, $1, 15 # encoding: [0x00,0x21,0x0b,0xc2]
166 rotr $1,$14,15 # CHECK: rotr $1, $14, 15 # encoding: [0x00,0x2e,0x0b,0xc2]
  /external/llvm/test/MC/Mips/mips32r5/
valid.s 166 rotr $1,15 # CHECK: rotr $1, $1, 15 # encoding: [0x00,0x21,0x0b,0xc2]
167 rotr $1,$14,15 # CHECK: rotr $1, $14, 15 # encoding: [0x00,0x2e,0x0b,0xc2]
  /external/llvm/test/MC/Mips/mips64r2/
valid.s 232 rotr $1,15 # CHECK: rotr $1, $1, 15 # encoding: [0x00,0x21,0x0b,0xc2]
233 rotr $1,$14,15 # CHECK: rotr $1, $14, 15 # encoding: [0x00,0x2e,0x0b,0xc2]
  /external/llvm/test/MC/Mips/mips64r3/
valid.s 232 rotr $1,15 # CHECK: rotr $1, $1, 15 # encoding: [0x00,0x21,0x0b,0xc2]
233 rotr $1,$14,15 # CHECK: rotr $1, $14, 15 # encoding: [0x00,0x2e,0x0b,0xc2]
  /external/llvm/test/MC/Mips/mips64r5/
valid.s 233 rotr $1,15 # CHECK: rotr $1, $1, 15 # encoding: [0x00,0x21,0x0b,0xc2]
234 rotr $1,$14,15 # CHECK: rotr $1, $14, 15 # encoding: [0x00,0x2e,0x0b,0xc2]
  /external/v8/test/cctest/
test-disasm-mips.cc 626 COMPARE(rotr(a0, a1, 0),
627 "00252002 rotr a0, a1, 0");
628 COMPARE(rotr(s0, s1, 8),
629 "00318202 rotr s0, s1, 8");
630 COMPARE(rotr(t2, t3, 24),
631 "002b5602 rotr t2, t3, 24");
632 COMPARE(rotr(v0, v1, 31),
633 "002317c2 rotr v0, v1, 31");
    [all...]
test-disasm-mips64.cc 531 COMPARE(rotr(a0, a1, 0), "00252002 rotr a0, a1, 0");
532 COMPARE(rotr(s0, s1, 8), "00318202 rotr s0, s1, 8");
533 COMPARE(rotr(a6, a7, 24), "002b5602 rotr a6, a7, 24");
534 COMPARE(rotr(v0, v1, 31), "002317c2 rotr v0, v1, 31");
    [all...]
  /external/llvm/include/llvm/ADT/
APInt.h 883 APInt LLVM_ATTRIBUTE_UNUSED_RESULT rotr(unsigned rotateAmt) const;
904 APInt LLVM_ATTRIBUTE_UNUSED_RESULT rotr(const APInt &rotateAmt) const;
    [all...]
  /toolchain/binutils/binutils-2.25/opcodes/
rx-decode.opc 711 /** 1111 1101 0110 110i mmmm rdst rotr #%1, %0 */
712 ID(rotr); SC(i*16+mmmm); DR(rdst); F__SZC;
714 /** 1111 1101 0110 0100 rsrc rdst rotr %1, %0 */
715 ID(rotr); SR(rsrc); DR(rdst); F__SZC;
  /external/llvm/lib/Support/
APInt.cpp     [all...]
  /external/v8/src/mips/
disasm-mips.cc 1049 Format(instr, "rotr 'rd, 'rt, 'sa");
    [all...]
  /external/v8/src/mips64/
disasm-mips64.cc     [all...]
  /toolchain/binutils/binutils-2.25/gas/testsuite/gas/sh/arch/
sh.s 112 rotr r4 ;!/* 0100nnnn00000101 rotr <REG_N> */{"rotr",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_5}, arch_sh_up}
sh2.s 125 rotr r4 ;!/* 0100nnnn00000101 rotr <REG_N> */{"rotr",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_5}, arch_sh_up}

Completed in 3244 milliseconds

12 3 4