/external/v8/src/ic/arm64/ |
ic-arm64.cc | 43 Register result, Register scratch1, 45 DCHECK(!AreAliased(elements, name, scratch1, scratch2)); 46 DCHECK(!AreAliased(result, scratch1, scratch2)); 52 name, scratch1, scratch2); 61 __ Ldr(scratch1, FieldMemOperand(scratch2, kDetailsOffset)); 62 __ Tst(scratch1, Smi::FromInt(PropertyDetails::TypeField::kMask)); 83 Register value, Register scratch1, 85 DCHECK(!AreAliased(elements, name, value, scratch1, scratch2)); 91 name, scratch1, scratch2); 104 __ Ldrsw(scratch1, UntagSmiFieldMemOperand(scratch2, kDetailsOffset)) [all...] |
handler-compiler-arm64.cc | 44 Handle<Name> name, Register scratch0, Register scratch1) { 45 DCHECK(!AreAliased(receiver, scratch0, scratch1)); 48 __ IncrementCounter(counters->negative_lookups(), 1, scratch0, scratch1); 49 __ IncrementCounter(counters->negative_lookups_miss(), 1, scratch0, scratch1); 57 Register map = scratch1; 76 masm, miss_label, &done, receiver, properties, name, scratch1); 78 __ DecrementCounter(counters->negative_lookups_miss(), 1, scratch0, scratch1); 94 MacroAssembler* masm, Register receiver, Register scratch1, 96 __ TryGetFunctionPrototype(receiver, scratch1, scratch2, miss_label); 101 __ Mov(x0, scratch1); 542 GenerateDictionaryNegativeLookup(masm(), miss, reg, name, scratch1, local [all...] |
/external/libvpx/libvpx/vpx_dsp/mips/ |
convolve2_avg_dspr2.c | 35 uint32_t scratch1, scratch2; local 65 "preceu.ph.qbr %[scratch1], %[load1] \n\t" 67 "precrq.ph.w %[p2], %[p1], %[scratch1] \n\t" /* pixel 2 */ 68 "append %[p1], %[scratch1], 16 \n\t" /* pixel 1 */ 73 "preceu.ph.qbl %[scratch1], %[load1] \n\t" 75 "precrq.ph.w %[p2], %[p1], %[scratch1] \n\t" /* pixel 2 */ 76 "append %[p1], %[scratch1], 16 \n\t" /* pixel 1 */ 84 "lbu %[scratch1], 0(%[dst_ptr]) \n\t" 88 "addqh_r.w %[store1], %[store1], %[scratch1] \n\t" /* pixel 1 */ 94 "lbu %[scratch1], 2(%[dst_ptr]) \n\t 139 uint32_t scratch1, scratch2; local [all...] |
convolve2_vert_dspr2.c | 35 uint32_t scratch1; local 65 "preceu.ph.qbr %[scratch1], %[load1] \n\t" 68 "precrq.ph.w %[p2], %[p1], %[scratch1] \n\t" /* pixel 2 */ 69 "append %[p1], %[scratch1], 16 \n\t" /* pixel 1 */ 74 "preceu.ph.qbl %[scratch1], %[load1] \n\t" 77 "precrq.ph.w %[p2], %[p1], %[scratch1] \n\t" /* pixel 2 */ 78 "append %[p1], %[scratch1], 16 \n\t" /* pixel 1 */ 103 [scratch1] "=&r" (scratch1), 132 uint32_t scratch1; local [all...] |
convolve8_vert_dspr2.c | 36 uint32_t scratch1, scratch2; local 74 "preceu.ph.qbr %[scratch1], %[load1] \n\t" 76 "precrq.ph.w %[n1], %[p1], %[scratch1] \n\t" /* pixel 2 */ 77 "append %[p1], %[scratch1], 16 \n\t" /* pixel 1 */ 88 "preceu.ph.qbl %[scratch1], %[load1] \n\t" 90 "precrq.ph.w %[n1], %[p1], %[scratch1] \n\t" /* pixel 2 */ 91 "append %[p1], %[scratch1], 16 \n\t" /* pixel 1 */ 111 "preceu.ph.qbr %[scratch1], %[load1] \n\t" 113 "precrq.ph.w %[n1], %[p1], %[scratch1] \n\t" /* pixel 2 */ 114 "append %[p1], %[scratch1], 16 \n\t" /* pixel 1 * 190 uint32_t scratch1, scratch2; local [all...] |
convolve8_avg_dspr2.c | 36 uint32_t scratch1, scratch2; local 74 "preceu.ph.qbr %[scratch1], %[load1] \n\t" 76 "precrq.ph.w %[n1], %[p1], %[scratch1] \n\t" /* pixel 2 */ 77 "append %[p1], %[scratch1], 16 \n\t" /* pixel 1 */ 88 "preceu.ph.qbl %[scratch1], %[load1] \n\t" 90 "precrq.ph.w %[n1], %[p1], %[scratch1] \n\t" /* pixel 2 */ 91 "append %[p1], %[scratch1], 16 \n\t" /* pixel 1 */ 111 "preceu.ph.qbr %[scratch1], %[load1] \n\t" 113 "precrq.ph.w %[n1], %[p1], %[scratch1] \n\t" /* pixel 2 */ 114 "append %[p1], %[scratch1], 16 \n\t" /* pixel 1 * 197 uint32_t scratch1, scratch2; local [all...] |
/hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vp9/common/mips/dspr2/ |
vp9_convolve2_avg_dspr2.c | 37 uint32_t scratch1, scratch2; local 67 "preceu.ph.qbr %[scratch1], %[load1] \n\t" 69 "precrq.ph.w %[p2], %[p1], %[scratch1] \n\t" /* pixel 2 */ 70 "append %[p1], %[scratch1], 16 \n\t" /* pixel 1 */ 75 "preceu.ph.qbl %[scratch1], %[load1] \n\t" 77 "precrq.ph.w %[p2], %[p1], %[scratch1] \n\t" /* pixel 2 */ 78 "append %[p1], %[scratch1], 16 \n\t" /* pixel 1 */ 86 "lbu %[scratch1], 0(%[dst_ptr]) \n\t" 90 "addqh_r.w %[store1], %[store1], %[scratch1] \n\t" /* pixel 1 */ 96 "lbu %[scratch1], 2(%[dst_ptr]) \n\t 141 uint32_t scratch1, scratch2; local [all...] |
vp9_convolve2_vert_dspr2.c | 37 uint32_t scratch1; local 67 "preceu.ph.qbr %[scratch1], %[load1] \n\t" 70 "precrq.ph.w %[p2], %[p1], %[scratch1] \n\t" /* pixel 2 */ 71 "append %[p1], %[scratch1], 16 \n\t" /* pixel 1 */ 76 "preceu.ph.qbl %[scratch1], %[load1] \n\t" 79 "precrq.ph.w %[p2], %[p1], %[scratch1] \n\t" /* pixel 2 */ 80 "append %[p1], %[scratch1], 16 \n\t" /* pixel 1 */ 105 [scratch1] "=&r" (scratch1), 134 uint32_t scratch1; local [all...] |
vp9_convolve8_vert_dspr2.c | 38 uint32_t scratch1, scratch2; local 76 "preceu.ph.qbr %[scratch1], %[load1] \n\t" 78 "precrq.ph.w %[n1], %[p1], %[scratch1] \n\t" /* pixel 2 */ 79 "append %[p1], %[scratch1], 16 \n\t" /* pixel 1 */ 90 "preceu.ph.qbl %[scratch1], %[load1] \n\t" 92 "precrq.ph.w %[n1], %[p1], %[scratch1] \n\t" /* pixel 2 */ 93 "append %[p1], %[scratch1], 16 \n\t" /* pixel 1 */ 113 "preceu.ph.qbr %[scratch1], %[load1] \n\t" 115 "precrq.ph.w %[n1], %[p1], %[scratch1] \n\t" /* pixel 2 */ 116 "append %[p1], %[scratch1], 16 \n\t" /* pixel 1 * 192 uint32_t scratch1, scratch2; local [all...] |
vp9_convolve8_avg_dspr2.c | 38 uint32_t scratch1, scratch2; local 76 "preceu.ph.qbr %[scratch1], %[load1] \n\t" 78 "precrq.ph.w %[n1], %[p1], %[scratch1] \n\t" /* pixel 2 */ 79 "append %[p1], %[scratch1], 16 \n\t" /* pixel 1 */ 90 "preceu.ph.qbl %[scratch1], %[load1] \n\t" 92 "precrq.ph.w %[n1], %[p1], %[scratch1] \n\t" /* pixel 2 */ 93 "append %[p1], %[scratch1], 16 \n\t" /* pixel 1 */ 113 "preceu.ph.qbr %[scratch1], %[load1] \n\t" 115 "precrq.ph.w %[n1], %[p1], %[scratch1] \n\t" /* pixel 2 */ 116 "append %[p1], %[scratch1], 16 \n\t" /* pixel 1 * 199 uint32_t scratch1, scratch2; local [all...] |
/external/v8/src/arm64/ |
macro-assembler-arm64.cc | [all...] |
/external/v8/src/ic/arm/ |
handler-compiler-arm.cc | 135 Handle<Name> name, Register scratch0, Register scratch1) { 139 __ IncrementCounter(counters->negative_lookups(), 1, scratch0, scratch1); 140 __ IncrementCounter(counters->negative_lookups_miss(), 1, scratch0, scratch1); 148 Register map = scratch1; 174 masm, miss_label, &done, receiver, properties, name, scratch1); 176 __ DecrementCounter(counters->negative_lookups_miss(), 1, scratch0, scratch1); 192 MacroAssembler* masm, Register receiver, Register scratch1, 194 __ TryGetFunctionPrototype(receiver, scratch1, scratch2, miss_label); 195 __ mov(r0, scratch1); 416 Register map_reg = scratch1(); 512 GenerateDictionaryNegativeLookup(masm(), miss, reg, name, scratch1, local [all...] |
ic-arm.cc | 49 Register result, Register scratch1, 52 // scratch1: Used as temporary and to hold the capacity of the property 59 name, scratch1, scratch2); 68 __ ldr(scratch1, FieldMemOperand(scratch2, kDetailsOffset)); 69 __ tst(scratch1, Operand(PropertyDetails::TypeField::kMask << kSmiTagSize)); 91 Register value, Register scratch1, 94 // scratch1: Used as temporary and to hold the capacity of the property 101 name, scratch1, scratch2); 114 __ ldr(scratch1, FieldMemOperand(scratch2, kDetailsOffset)); 115 __ tst(scratch1, Operand(kTypeAndReadOnlyMask)) [all...] |
/external/v8/src/ic/mips/ |
handler-compiler-mips.cc | 129 Handle<Name> name, Register scratch0, Register scratch1) { 133 __ IncrementCounter(counters->negative_lookups(), 1, scratch0, scratch1); 134 __ IncrementCounter(counters->negative_lookups_miss(), 1, scratch0, scratch1); 142 Register map = scratch1; 166 masm, miss_label, &done, receiver, properties, name, scratch1); 168 __ DecrementCounter(counters->negative_lookups_miss(), 1, scratch0, scratch1); 184 MacroAssembler* masm, Register receiver, Register scratch1, 186 __ TryGetFunctionPrototype(receiver, scratch1, scratch2, miss_label); 188 __ mov(v0, scratch1); 402 Register map_reg = scratch1(); 498 GenerateDictionaryNegativeLookup(masm(), miss, reg, name, scratch1, local [all...] |
/external/v8/src/ic/mips64/ |
handler-compiler-mips64.cc | 129 Handle<Name> name, Register scratch0, Register scratch1) { 133 __ IncrementCounter(counters->negative_lookups(), 1, scratch0, scratch1); 134 __ IncrementCounter(counters->negative_lookups_miss(), 1, scratch0, scratch1); 142 Register map = scratch1; 166 masm, miss_label, &done, receiver, properties, name, scratch1); 168 __ DecrementCounter(counters->negative_lookups_miss(), 1, scratch0, scratch1); 184 MacroAssembler* masm, Register receiver, Register scratch1, 186 __ TryGetFunctionPrototype(receiver, scratch1, scratch2, miss_label); 188 __ mov(v0, scratch1); 402 Register map_reg = scratch1(); 498 GenerateDictionaryNegativeLookup(masm(), miss, reg, name, scratch1, local [all...] |
/external/v8/src/ic/ppc/ |
handler-compiler-ppc.cc | 130 Handle<Name> name, Register scratch0, Register scratch1) { 134 __ IncrementCounter(counters->negative_lookups(), 1, scratch0, scratch1); 135 __ IncrementCounter(counters->negative_lookups_miss(), 1, scratch0, scratch1); 143 Register map = scratch1; 169 masm, miss_label, &done, receiver, properties, name, scratch1); 171 __ DecrementCounter(counters->negative_lookups_miss(), 1, scratch0, scratch1); 187 MacroAssembler* masm, Register receiver, Register scratch1, 189 __ TryGetFunctionPrototype(receiver, scratch1, scratch2, miss_label); 190 __ mr(r3, scratch1); 411 Register map_reg = scratch1(); 506 GenerateDictionaryNegativeLookup(masm(), miss, reg, name, scratch1, local [all...] |
ic-ppc.cc | 49 Register result, Register scratch1, 52 // scratch1: Used as temporary and to hold the capacity of the property 59 name, scratch1, scratch2); 68 __ LoadP(scratch1, FieldMemOperand(scratch2, kDetailsOffset)); 71 __ and_(scratch2, scratch1, scratch2, SetRC); 94 Register value, Register scratch1, 97 // scratch1: Used as temporary and to hold the capacity of the property 104 name, scratch1, scratch2); 116 __ LoadP(scratch1, FieldMemOperand(scratch2, kDetailsOffset)); 119 __ and_(scratch2, scratch1, scratch2, SetRC) [all...] |
/external/v8/src/s390/ |
code-stubs-s390.h | 29 Register scratch1, 36 Register scratch1, 43 Register scratch1, 231 inline Register scratch1() { return scratch1_; } function in class:v8::internal::RecordWriteStub::RegisterAllocation 359 static void LoadSmis(MacroAssembler* masm, Register scratch1, 370 Register scratch1, Register scratch2, 378 Register scratch1, Register scratch2, 407 Register scratch1, Register scratch2, 418 Register scratch1, Register scratch2, 460 Register scratch1, Register scratch2 [all...] |
/external/v8/src/ic/s390/ |
handler-compiler-s390.cc | 124 Handle<Name> name, Register scratch0, Register scratch1) { 128 __ IncrementCounter(counters->negative_lookups(), 1, scratch0, scratch1); 129 __ IncrementCounter(counters->negative_lookups_miss(), 1, scratch0, scratch1); 137 Register map = scratch1; 161 masm, miss_label, &done, receiver, properties, name, scratch1); 163 __ DecrementCounter(counters->negative_lookups_miss(), 1, scratch0, scratch1); 177 MacroAssembler* masm, Register receiver, Register scratch1, 179 __ TryGetFunctionPrototype(receiver, scratch1, scratch2, miss_label); 180 __ LoadRR(r2, scratch1); 386 Register map_reg = scratch1(); 480 GenerateDictionaryNegativeLookup(masm(), miss, reg, name, scratch1, local [all...] |
/external/v8/src/ppc/ |
macro-assembler-ppc.cc | [all...] |
/external/libvpx/libvpx/vp8/common/x86/ |
loopfilter_block_sse2_x86_64.asm | 18 movdqa scratch1, %2 ; v2 20 psubusb scratch1, %1 ; v2 - v1 22 por %1, scratch1 ; abs(v2 - v1) 72 movdqa scratch1, %1 73 psubsb scratch1, %4 ; signed_char_clamp(ps1 - qs1) 74 pandn scratch2, scratch1 ; vp8_filter &= hev 78 movdqa scratch1, %3 79 psubsb scratch1, %2 ; qs0 - ps0 80 paddsb scratch2, scratch1 ; vp8_filter += (qs0 - ps0) 81 paddsb scratch2, scratch1 ; vp8_filter += (qs0 - ps0 [all...] |
/hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vp8/common/x86/ |
loopfilter_block_sse2.asm | 18 movdqa scratch1, %2 ; v2 20 psubusb scratch1, %1 ; v2 - v1 22 por %1, scratch1 ; abs(v2 - v1) 72 movdqa scratch1, %1 73 psubsb scratch1, %4 ; signed_char_clamp(ps1 - qs1) 74 pandn scratch2, scratch1 ; vp8_filter &= hev 78 movdqa scratch1, %3 79 psubsb scratch1, %2 ; qs0 - ps0 80 paddsb scratch2, scratch1 ; vp8_filter += (qs0 - ps0) 81 paddsb scratch2, scratch1 ; vp8_filter += (qs0 - ps0 [all...] |
/external/v8/src/arm/ |
macro-assembler-arm.cc | [all...] |
/device/google/contexthub/firmware/src/cpu/cortexm4f/ |
atomicBitset.c | 87 uint32_t scratch1, scratch2, scratch3, bit = 32; local 105 :"=r"(scratch1), "=r"(bit), "=r"(scratch2), "=l"(scratch3), "=r"(wordPtr)
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/external/v8/src/ia32/ |
macro-assembler-ia32.cc | 480 Register scratch1, 485 Register address = scratch1; 533 mov(scratch1, Immediate(bit_cast<int32_t>(kZapValue))); 859 Register scratch1, 879 mov(scratch1, maybe_number); 880 SmiUntag(scratch1); 881 Cvtsi2sd(scratch2, scratch1); 907 void MacroAssembler::DispatchWeakMap(Register obj, Register scratch1, 915 mov(scratch1, FieldOperand(obj, HeapObject::kMapOffset)); 916 CmpWeakValue(scratch1, cell, scratch2) 1827 mov(FieldOperand(result, String::kLengthOffset), scratch1); local 1855 mov(FieldOperand(result, String::kLengthOffset), scratch1); local 1867 Allocate(SeqOneByteString::SizeFor(length), result, scratch1, scratch2, local [all...] |