/external/libvpx/libvpx/vpx_dsp/mips/ |
vpx_convolve8_horiz_msa.c | 19 v16i8 src0, src1, src2, src3, filt0, filt1, filt2, filt3; 46 v16i8 filt0, filt1, filt2, filt3; 47 v16i8 src0, src1, src2, src3; 93 v16i8 src0, src1, src2, src3, filt0, filt1, filt2, filt3; 124 v16i8 src0, src1, src2, src3, filt0, filt1, filt2, filt3; 169 v16i8 src0, src1, src2, src3, filt0, filt1, filt2, filt3; 207 v16i8 src0, src1, src2, src3, filt0, filt1, filt2, filt3; 265 v16i8 src0, src1, src2, src3, filt0, filt1, filt2, filt3; 320 v16i8 src0, src1, src2, src3, mask; 342 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, mask [all...] |
vpx_convolve8_avg_horiz_msa.c | 20 v16i8 src0, src1, src2, src3, filt0, filt1, filt2, filt3; 55 v16i8 src0, src1, src2, src3, filt0, filt1, filt2, filt3; 114 v16i8 src0, src1, src2, src3, filt0, filt1, filt2, filt3; 152 v16i8 src0, src1, src2, src3, filt0, filt1, filt2, filt3; 208 v16i8 src0, src1, src2, src3, filt0, filt1, filt2, filt3; 265 v16i8 src0, src1, src2, src3, filt0, filt1, filt2, filt3; 325 v16i8 src0, src1, src2, src3, mask; 351 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, mask; 398 v16i8 src0, src1, src2, src3, mask; 425 v16i8 src0, src1, src2, src3, mask [all...] |
fwd_txfm_msa.c | 178 v16i8 zero = { 0 }; 179 v16i8 one = __msa_ldi_b(1);
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loopfilter_8_msa.c | 24 v16i8 zero = { 0 }; 229 vec4 = (v8i16)__msa_ilvr_b((v16i8)q2, (v16i8)q1);
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inv_txfm_msa.h | 98 v16i8 tmp0_m, tmp1_m; \ 99 v16i8 zero_m = { 0 }; \
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variance_msa.c | 494 v16i8 src = { 0 }; 495 v16i8 ref = { 0 };
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/external/llvm/lib/Target/AArch64/ |
AArch64TargetTransformInfo.cpp | 194 { ISD::TRUNCATE, MVT::v16i8, MVT::v16i32, 6 }, 209 { ISD::SIGN_EXTEND, MVT::v16i16, MVT::v16i8, 2 }, 210 { ISD::ZERO_EXTEND, MVT::v16i16, MVT::v16i8, 2 }, 211 { ISD::SIGN_EXTEND, MVT::v16i32, MVT::v16i8, 6 }, 212 { ISD::ZERO_EXTEND, MVT::v16i32, MVT::v16i8, 6 }, 243 { ISD::SINT_TO_FP, MVT::v16f32, MVT::v16i8, 21 }, 244 { ISD::UINT_TO_FP, MVT::v16f32, MVT::v16i8, 21 },
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AArch64ISelDAGToDAG.cpp | [all...] |
/external/libvpx/libvpx/vp8/common/mips/msa/ |
idct_msa.c | 93 v16i8 zero = { 0 }; 94 v16i8 pred0, pred1, pred2, pred3, dest0, dest1, dest2, dest3; 95 v16i8 mask = { 0, 4, 8, 12, 20, 21, 22, 23, 24, 128 v16i8 zero = { 0 }; 129 v16i8 pred0, pred1, pred2, pred3, dest0, dest1, dest2, dest3; 130 v16i8 mask = { 0, 2, 4, 6, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31 }; 185 v16i8 dest0, dest1, dest2, dest3; 189 v16i8 mask = { 0, 4, 8, 12, 20, 21, 22, 23, 24, 231 v16i8 zero = { 0 }; 290 v16i8 zero = { 0 } [all...] |
/external/libvpx/libvpx/vp8/encoder/mips/msa/ |
temporal_filter_msa.c | 22 v16i8 frame1_0_b, frame1_1_b, frame2_0_b, frame2_1_b; 24 v16i8 zero = { 0 }; 137 v16i8 frame1 = { 0 }; 138 v16i8 frame2 = { 0 }; 139 v16i8 frame3 = { 0 }; 140 v16i8 frame4 = { 0 };
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quantize_msa.c | 21 v16i8 inv_zig_zag = { 0, 1, 5, 6, 2, 4, 7, 12, 100 v16i8 inv_zig_zag = { 0, 1, 5, 6, 2, 4, 7, 12,
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/external/llvm/lib/Target/ARM/ |
ARMTargetTransformInfo.cpp | 95 { ISD::SIGN_EXTEND, MVT::v16i32, MVT::v16i8, 6 }, 96 { ISD::ZERO_EXTEND, MVT::v16i32, MVT::v16i8, 6 }, 99 { ISD::TRUNCATE, MVT::v16i8, MVT::v16i32, 6 }, 350 {ISD::VECTOR_SHUFFLE, MVT::v16i8, 2}}; 376 {ISD::VECTOR_SHUFFLE, MVT::v16i8, 32}}; 431 { ISD::SDIV, MVT::v16i8, 16 * FunctionCallDivCost}, 432 { ISD::UDIV, MVT::v16i8, 16 * FunctionCallDivCost}, 433 { ISD::SREM, MVT::v16i8, 16 * FunctionCallDivCost}, 434 { ISD::UREM, MVT::v16i8, 16 * FunctionCallDivCost},
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ARMISelDAGToDAG.cpp | [all...] |
/external/libvpx/libvpx/vp9/encoder/mips/msa/ |
vp9_temporal_filter_msa.c | 23 v16i8 frm2, frm1 = { 0 }; 24 v16i8 frm4, frm3 = { 0 }; 152 v16i8 frm1, frm2, frm3, frm4; 154 v16i8 zero = { 0 };
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/external/llvm/lib/Target/X86/InstPrinter/ |
X86InstComments.cpp | 58 SrcVT = MVT::v16i8; 63 SrcVT = MVT::v16i8; 70 SrcVT = MVT::v16i8; 75 SrcVT = MVT::v16i8; 82 SrcVT = MVT::v16i8; 87 SrcVT = MVT::v16i8;
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/external/clang/test/CodeGen/ |
builtins-mips-msa.c | 5 typedef signed char v16i8 __attribute__ ((vector_size(16))); typedef 18 v16i8 v16i8_a = (v16i8) {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15}; 19 v16i8 v16i8_b = (v16i8) {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16}; 20 v16i8 v16i8_r; [all...] |
/external/llvm/lib/IR/ |
ValueTypes.cpp | 152 case MVT::v16i8: return "v16i8"; 230 case MVT::v16i8: return VectorType::get(Type::getInt8Ty(Context), 16);
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/external/llvm/lib/Target/PowerPC/ |
PPCTargetTransformInfo.cpp | 348 (LT.second == MVT::v16i8 || LT.second == MVT::v8i16 ||
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PPCISelLowering.cpp | 426 // We promote all shuffles to v16i8. 428 AddPromotedToType (ISD::VECTOR_SHUFFLE, VT, MVT::v16i8); 500 setOperationAction(ISD::VECTOR_SHUFFLE, MVT::v16i8, Custom); 521 addRegisterClass(MVT::v16i8, &PPC::VRRCRegClass); 537 setOperationAction(ISD::MUL, MVT::v16i8, Custom); 542 setOperationAction(ISD::BUILD_VECTOR, MVT::v16i8, Custom); 561 setOperationAction(ISD::SCALAR_TO_VECTOR, MVT::v16i8, Legal); 565 setOperationAction(ISD::EXTRACT_VECTOR_ELT, MVT::v16i8, Legal); 586 setOperationAction(ISD::VSELECT, MVT::v16i8, Legal); [all...] |
/external/llvm/lib/Target/X86/ |
X86ISelLowering.cpp | [all...] |
/external/llvm/lib/Target/Mips/ |
MipsSEInstrInfo.cpp | 207 else if (RC->hasType(MVT::v16i8)) 280 else if (RC->hasType(MVT::v16i8))
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/external/llvm/utils/TableGen/ |
CodeGenTarget.cpp | 85 case MVT::v16i8: return "MVT::v16i8";
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/prebuilts/gcc/darwin-x86/mips/mips64el-linux-android-4.9/lib/gcc/mips64el-linux-android/4.9/include/ |
msa.h | 31 typedef signed char v16i8 __attribute__((vector_size(16), aligned(16))); typedef
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/prebuilts/gcc/linux-x86/mips/mips64el-linux-android-4.9/lib/gcc/mips64el-linux-android/4.9/include/ |
msa.h | 31 typedef signed char v16i8 __attribute__((vector_size(16), aligned(16))); typedef
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/external/llvm/lib/Target/SystemZ/ |
SystemZISelLowering.cpp | 105 addRegisterClass(MVT::v16i8, &SystemZ::VR128BitRegClass); [all...] |