| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/aarch64/ |
| bitfield-dump | 38 80: 131000ff sbfiz wzr, w7, #16, #1
39 84: 13101cff sbfiz wzr, w7, #16, #8
40 88: 13103cff sbfiz wzr, w7, #16, #16
41 8c: 130100ff sbfiz wzr, w7, #31, #1
45 9c: 936000ff sbfiz xzr, x7, #32, #1
46 a0: 93603cff sbfiz xzr, x7, #32, #16
47 a4: 93607cff sbfiz xzr, x7, #32, #32
48 a8: 934100ff sbfiz xzr, x7, #63, #1
|
| diagnostic.s | 37 sbfiz w0, w7, 15, 18
38 sbfiz w0, w7, 15, 0
|
| bitfield-alias.s | 96 .irp op, sbfiz, sbfx, bfi, bfxil, ubfiz, ubfx
|
| diagnostic.l | 35 [^:]*:37: Error: immediate value out of range 1 to 17 at operand 4 -- `sbfiz w0,w7,15,18'
36 [^:]*:38: Error: immediate value out of range 1 to 32 at operand 4 -- `sbfiz w0,w7,15,0'
|
| /external/llvm/test/MC/AArch64/ |
| arm64-bitfield-encoding.s | 14 sbfiz wzr, w0, #31, #1
15 sbfiz xzr, x0, #31, #1
25 ; CHECK: sbfiz wzr, w0, #31, #1 ; encoding: [0x1f,0x00,0x01,0x13]
26 ; CHECK: sbfiz xzr, x0, #31, #1 ; encoding: [0x1f,0x00,0x61,0x93]
|
| arm64-aliases.s | 180 sbfiz w0, w0, #1, #4
181 sbfiz x0, x0, #1, #4
195 ; CHECK: sbfiz w0, w0, #1, #4
196 ; CHECK: sbfiz x0, x0, #1, #4
|
| basic-a64-diagnostics.s | [all...] |
| basic-a64-instructions.s | [all...] |
| /external/llvm/test/CodeGen/AArch64/ |
| arm64-shifted-sext.ll | 9 ; CHECK: sbfiz w0, [[REG]], #4, #8
33 ; CHECK: sbfiz w0, [[REG]], #8, #8
58 ; CHECK: sbfiz w0, [[REG]], #4, #8
80 ; CHECK: sbfiz w0, [[REG]], #8, #8
103 ; CHECK: sbfiz x0, x[[REG]], #4, #8
125 ; CHECK: sbfiz x0, x[[REG]], #8, #8
148 ; CHECK: sbfiz w0, [[REG]], #4, #16
193 ; CHECK: sbfiz x0, x[[REG]], #4, #16
215 ; CHECK: sbfiz x0, x[[REG]], #16, #16
238 ; CHECK: sbfiz x0, x[[REG]], #4, #3
[all...] |
| xbfiz.ll | 5 ; CHECK: sbfiz x0, x0, #1, #16
13 ; CHECK: sbfiz w0, w0, #1, #14
|
| fast-isel-shift.ll | 104 ; CHECK: sbfiz {{w[0-9]*}}, {{w[0-9]*}}, #4, #1
120 ; CHECK: sbfiz {{w[0-9]*}}, {{w[0-9]*}}, #4, #1
136 ; CHECK: sbfiz {{x[0-9]*}}, {{x[0-9]*}}, #4, #1
168 ; CHECK: sbfiz {{w[0-9]*}}, {{w[0-9]*}}, #4, #8
184 ; CHECK: sbfiz {{w[0-9]*}}, {{w[0-9]*}}, #4, #8
200 ; CHECK: sbfiz {{x[0-9]*}}, {{x[0-9]*}}, #4, #8
232 ; CHECK: sbfiz {{w[0-9]*}}, {{w[0-9]*}}, #8, #16
248 ; CHECK: sbfiz {{x[0-9]*}}, {{x[0-9]*}}, #8, #16
278 ; CHECK: sbfiz {{x[0-9]+}}, {{x[0-9]+}}, #16, #32
|
| fast-isel-addressing-modes.ll | 568 ; CHECK: sbfiz [[REG:x[0-9]+]], {{x[0-9]+}}, #3, #32
|
| /prebuilts/go/darwin-x86/pkg/bootstrap/src/bootstrap/internal/obj/arm64/ |
| anames.go | 170 "SBFIZ",
|
| /prebuilts/go/darwin-x86/src/cmd/internal/obj/arm64/ |
| anames.go | 167 "SBFIZ",
|
| /prebuilts/go/linux-x86/src/cmd/internal/obj/arm64/ |
| anames.go | 167 "SBFIZ",
|
| /prebuilts/go/linux-x86/pkg/bootstrap/src/bootstrap/internal/obj/arm64/ |
| anames.go | 170 "SBFIZ",
|
| /toolchain/binutils/binutils-2.25/opcodes/ |
| aarch64-asm-2.c | 99 case 494: /* sbfiz */
|
| aarch64-asm.c | 1017 SBFIZ <Xd>, <Xn>, #<lsb>, #<width>
[all...] |
| /external/v8/test/cctest/ |
| test-disasm-arm64.cc | 156 COMPARE(Mov(w14, Operand(w15, SXTH, 2)), "sbfiz w14, w15, #2, #16");
157 COMPARE(Mov(x16, Operand(x20, SXTW, 3)), "sbfiz x16, x20, #3, #32");
552 COMPARE(sbfiz(w1, w2, 1, 20), "sbfiz w1, w2, #1, #20");
553 COMPARE(sbfiz(x3, x4, 2, 19), "sbfiz x3, x4, #2, #19");
[all...] |
| /external/v8/src/arm64/ |
| macro-assembler-arm64-inl.h | 1061 void MacroAssembler::Sbfiz(const Register& rd,
1067 sbfiz(rd, rn, lsb, width);
[all...] |
| disasm-arm64.cc | 453 mnemonic = "sbfiz";
[all...] |
| /external/llvm/lib/Target/AArch64/InstPrinter/ |
| AArch64InstPrinter.cpp | 142 // SBFIZ/UBFIZ aliases
144 O << '\t' << (IsSigned ? "sbfiz" : "ubfiz") << '\t'
[all...] |
| /external/vixl/doc/ |
| supported-instructions.md | 1007 ### SBFIZ ###
1011 void sbfiz(const Register& rd,
[all...] |
| /external/vixl/src/vixl/a64/ |
| macro-assembler-a64.h | [all...] |
| /external/llvm/test/MC/Disassembler/AArch64/ |
| basic-a64-instructions.txt | 679 # CHECK: sbfiz x2, x3, #63, #1
681 # CHECK: sbfiz x9, x10, #5, #59
683 # CHECK: sbfiz w11, w12, #31, #1
684 # CHECK: sbfiz w13, w14, #29, #3
685 # CHECK: sbfiz xzr, xzr, #10, #11
[all...] |
