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  /external/strace/xlat/
at_flags.in 4 AT_NO_AUTOMOUNT 0x800
openmodessol.in 9 { 0x800, "O_NOCTTY" },
openmodessol.h 19 { 0x800, "O_NOCTTY" },
at_flags.h 12 # define AT_NO_AUTOMOUNT 0x800
  /toolchain/binutils/binutils-2.25/ld/testsuite/ld-elf/
data1.h 1 #define ALIGNMENT1 0x800
  /external/avahi/tests/
fuzz-mdns.py 6 sendp(Ether(type=0x800, dst="ff:ff:ff:ff:ff:ff")/IP(dst="224.0.0.251")/fuzz(UDP(dport = 5353, sport = 5353)/DNS(qd = fuzz(DNSQR()))),loop=1, iface="realtek0")
  /toolchain/binutils/binutils-2.25/gas/testsuite/gas/d10v/
inst.d 13 c: f2 11 08 00 ld r1, @0x800
14 10: f3 01 08 00 ld2w r0, @0x800
15 14: f7 01 08 00 st2w r0, @0x800
16 18: f6 11 08 00 st r1, @0x800
  /toolchain/binutils/binutils-2.25/gas/testsuite/gas/arm/
thumb2_add.s 8 add r0, pc, #0x800
14 sub r0, pc, #0x800
thumb2_add.d 7 0+000 <[^>]+> f60f 0000 addw r0, pc, #2048 ; 0x800
13 0+018 <[^>]+> f6af 0000 subw r0, pc, #2048 ; 0x800
  /toolchain/binutils/binutils-2.25/gas/testsuite/gas/bfin/
allinsn16.s 23 _dw \b, \i, \i + 0x800
24 dw \b, \i + 0x800, \e
  /toolchain/binutils/binutils-2.25/ld/testsuite/ld-mips-elf/
eh-frame5.ld 9 . = 0x800;
  /prebuilts/gcc/linux-x86/host/x86_64-w64-mingw32-4.8/x86_64-w64-mingw32/include/
commctrl.rh 17 #define RBS_FIXEDORDER 0x800
29 #define SBARS_TOOLTIPS 0x800
30 #define SBT_TOOLTIPS 0x800
85 #define LVS_ALIGNLEFT 0x800
102 #define TVS_INFOTIP 0x800
123 #define TCS_RAGGEDRIGHT 0x800
  /external/autotest/client/site_tests/hardware_Resolution/
control 10 - 1280x800
  /toolchain/binutils/binutils-2.25/ld/testsuite/ld-frv/
fr450-link.d 10 private flags = 0x800[08]000: -mcpu=fr450(| -mfdpic)
  /toolchain/binutils/binutils-2.25/gold/testsuite/
arm_thm_jump11.t 28 . = ALIGN(0x800);
30 . = ALIGN(0x800);
  /external/mp4parser/isoparser/src/main/java/com/coremedia/iso/boxes/fragment/
TrackRunBox.java 180 if ((flags & 0x800) == 0x800) { //sampleCompositionTimeOffsetPresent
209 if ((flags & 0x800) == 0x800) { //sampleCompositionTimeOffsetPresent
240 if ((getFlags() & 0x800) == 0x800) { //sampleCompositionTimeOffsetPresent
274 return (getFlags() & 0x800) == 0x800;
312 setFlags(getFlags() | 0x800);
314 setFlags(getFlags() & (0xFFFFFF ^ 0x800));
    [all...]
  /external/valgrind/none/tests/x86/
insn_basic.def 190 cmpb imm8[100] al.sb[-100] => eflags[0x800,0x800]
191 cmpb imm8[50] al.sb[-50] => eflags[0x800,0x000]
192 cmpb imm8[-50] al.sb[50] => eflags[0x800,0x000]
193 cmpb imm8[-100] al.sb[100] => eflags[0x800,0x800]
200 cmpb imm8[100] r8.sb[-100] => eflags[0x800,0x800]
201 cmpb imm8[50] r8.sb[-50] => eflags[0x800,0x000]
202 cmpb imm8[-50] r8.sb[50] => eflags[0x800,0x000
    [all...]
insn_cmov.def 37 cmovg eflags[0x8c0,0x800] : r16.uw[12345] r16.uw[0] => 1.uw[0]
45 cmovg eflags[0x8c0,0x800] : m16.uw[12345] r16.uw[0] => 1.uw[0]
51 cmovge eflags[0x8c0,0x800] : r16.uw[12345] r16.uw[0] => 1.uw[0]
55 cmovge eflags[0x8c0,0x800] : m16.uw[12345] r16.uw[0] => 1.uw[0]
59 cmovl eflags[0x8c0,0x800] : r16.uw[12345] r16.uw[0] => 1.uw[12345]
63 cmovl eflags[0x8c0,0x800] : m16.uw[12345] r16.uw[0] => 1.uw[12345]
69 cmovle eflags[0x8c0,0x800] : r16.uw[12345] r16.uw[0] => 1.uw[12345]
77 cmovle eflags[0x8c0,0x800] : m16.uw[12345] r16.uw[0] => 1.uw[12345]
117 cmovng eflags[0x8c0,0x800] : r16.uw[12345] r16.uw[0] => 1.uw[12345]
125 cmovng eflags[0x8c0,0x800] : m16.uw[12345] r16.uw[0] => 1.uw[12345
    [all...]
insn_sse3.def 24 fisttps fpucw[0xc00,0x800] st0.ps[1234.5678] st1.ps[1111.1111] : m16.sw[0] => 0.sw[1234] st0.ps[1111.1111]
25 fisttps fpucw[0xc00,0x800] st0.ps[-1234.5678] st1.ps[1111.1111] : m16.sw[0] => 0.sw[-1234] st0.ps[1111.1111]
32 fisttpl fpucw[0xc00,0x800] st0.pd[1234567.7654321] st1.ps[1111.1111] : m32.sd[0] => 0.sd[1234567] st0.ps[1111.1111]
33 fisttpl fpucw[0xc00,0x800] st0.pd[-1234567.7654321] st1.ps[1111.1111] : m32.sd[0] => 0.sd[-1234567] st0.ps[1111.1111]
40 fisttpq fpucw[0xc00,0x800] st0.pd[123456787654321.6] st1.ps[1111.1111] : m64.sq[0] => 0.sq[123456787654321] st0.ps[1111.1111]
41 fisttpq fpucw[0xc00,0x800] st0.pd[-123456787654321.6] st1.ps[1111.1111] : m64.sq[0] => 0.sq[-123456787654321] st0.ps[1111.1111]
  /external/valgrind/none/tests/amd64/
insn_basic.def 240 cmpb imm8[100] al.sb[-100] => eflags[0x800,0x800]
241 cmpb imm8[50] al.sb[-50] => eflags[0x800,0x000]
242 cmpb imm8[-50] al.sb[50] => eflags[0x800,0x000]
243 cmpb imm8[-100] al.sb[100] => eflags[0x800,0x800]
250 cmpb imm8[100] r8.sb[-100] => eflags[0x800,0x800]
251 cmpb imm8[50] r8.sb[-50] => eflags[0x800,0x000]
252 cmpb imm8[-50] r8.sb[50] => eflags[0x800,0x000
    [all...]
insn_sse3.def 24 fisttps fpucw[0xc00,0x800] st0.ps[1234.5678] st1.ps[1111.1111] : m16.sw[0] => 0.sw[1234] st0.ps[1111.1111]
25 fisttps fpucw[0xc00,0x800] st0.ps[-1234.5678] st1.ps[1111.1111] : m16.sw[0] => 0.sw[-1234] st0.ps[1111.1111]
32 fisttpl fpucw[0xc00,0x800] st0.pd[1234567.7654321] st1.ps[1111.1111] : m32.sd[0] => 0.sd[1234567] st0.ps[1111.1111]
33 fisttpl fpucw[0xc00,0x800] st0.pd[-1234567.7654321] st1.ps[1111.1111] : m32.sd[0] => 0.sd[-1234567] st0.ps[1111.1111]
40 fisttpq fpucw[0xc00,0x800] st0.pd[123456787654321.6] st1.ps[1111.1111] : m64.sq[0] => 0.sq[123456787654321] st0.ps[1111.1111]
41 fisttpq fpucw[0xc00,0x800] st0.pd[-123456787654321.6] st1.ps[1111.1111] : m64.sq[0] => 0.sq[-123456787654321] st0.ps[1111.1111]
  /external/mesa3d/src/gallium/auxiliary/util/
u_dirty_flags.h 19 #define U_NEW_CLIP 0x800
  /toolchain/binutils/binutils-2.25/gas/testsuite/gas/mips/
ulw-reloc.s 7 ulw $4,0x800($4)
17 ulw $4,0x800($5)
  /external/ImageMagick/MagickCore/
nt-base.h 111 !(defined(__MSVCRT_VERSION__) && (__MSVCRT_VERSION__ < 0x800))
118 !(defined(__MSVCRT_VERSION__) && (__MSVCRT_VERSION__ < 0x800))
130 !(defined(__MSVCRT_VERSION__) && (__MSVCRT_VERSION__ < 0x800))
154 !(defined(__MSVCRT_VERSION__) && (__MSVCRT_VERSION__ < 0x800))
235 !(defined(__MSVCRT_VERSION__) && (__MSVCRT_VERSION__ < 0x800))
252 !(defined(__MSVCRT_VERSION__) && (__MSVCRT_VERSION__ < 0x800))
289 !(defined(__MSVCRT_VERSION__) && (__MSVCRT_VERSION__ < 0x800))
  /toolchain/binutils/binutils-2.25/gas/testsuite/gas/i386/
avx512bw_vl-intel.d 17 [ ]*[a-f0-9]+:[ ]*62 f2 7d 0f 1c b2 00 08 00 00[ ]*vpabsb xmm6\{k7\},XMMWORD PTR \[edx\+0x800\]
18 [ ]*[a-f0-9]+:[ ]*62 f2 7d 0f 1c 72 80[ ]*vpabsb xmm6\{k7\},XMMWORD PTR \[edx-0x800\]
33 [ ]*[a-f0-9]+:[ ]*62 f2 7d 0f 1d b2 00 08 00 00[ ]*vpabsw xmm6\{k7\},XMMWORD PTR \[edx\+0x800\]
34 [ ]*[a-f0-9]+:[ ]*62 f2 7d 0f 1d 72 80[ ]*vpabsw xmm6\{k7\},XMMWORD PTR \[edx-0x800\]
50 [ ]*[a-f0-9]+:[ ]*62 f1 55 0f 6b b2 00 08 00 00[ ]*vpackssdw xmm6\{k7\},xmm5,XMMWORD PTR \[edx\+0x800\]
51 [ ]*[a-f0-9]+:[ ]*62 f1 55 0f 6b 72 80[ ]*vpackssdw xmm6\{k7\},xmm5,XMMWORD PTR \[edx-0x800\]
75 [ ]*[a-f0-9]+:[ ]*62 f1 55 0f 63 b2 00 08 00 00[ ]*vpacksswb xmm6\{k7\},xmm5,XMMWORD PTR \[edx\+0x800\]
76 [ ]*[a-f0-9]+:[ ]*62 f1 55 0f 63 72 80[ ]*vpacksswb xmm6\{k7\},xmm5,XMMWORD PTR \[edx-0x800\]
92 [ ]*[a-f0-9]+:[ ]*62 f2 55 0f 2b b2 00 08 00 00[ ]*vpackusdw xmm6\{k7\},xmm5,XMMWORD PTR \[edx\+0x800\]
93 [ ]*[a-f0-9]+:[ ]*62 f2 55 0f 2b 72 80[ ]*vpackusdw xmm6\{k7\},xmm5,XMMWORD PTR \[edx-0x800\]
    [all...]

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