/external/valgrind/none/tests/x86/ |
bug152818-x86.stdout.exp | 1 REP lodsb (EAX = 12348765, EFLAGS = ) => DF = 0, count = 4 (EAX = 123487FD, EFLAGS = ) 2 REP lodsb (EAX = 12348765, EFLAGS = ) => DF = 0, count = 3 (EAX = 123487FE, EFLAGS = ) 3 REP lodsb (EAX = 12348765, EFLAGS = ) => DF = 0, count = 2 (EAX = 123487FF, EFLAGS = ) 4 REP lodsb (EAX = 12348765, EFLAGS = ) => DF = 0, count = 1 (EAX = 123487AA, EFLAGS = ) 5 REP lodsb (EAX = 12348765, EFLAGS = ) => DF = 0, count = 0 (EAX = 12348765, EFLAGS = [all...] |
insn_basic.def | 1 ###aaa eflags[0x11,0x01] al.ub[0x1] ah.ub[0x0] : => al.ub[0x1] ah.ub[0x00] eflags[0x11,0x00] 2 ###aaa eflags[0x11,0x01] al.ub[0x9] ah.ub[0x0] : => al.ub[0x9] ah.ub[0x00] eflags[0x11,0x00] 3 ###aaa eflags[0x11,0x00] al.ub[0xa] ah.ub[0x0] : => al.ub[0x0] ah.ub[0x01] eflags[0x11,0x11] 4 ###aaa eflags[0x11,0x00] al.ub[0xf] ah.ub[0x0] : => al.ub[0x5] ah.ub[0x01] eflags[0x11,0x11] 5 ###aaa eflags[0x11,0x10] al.ub[0x1] ah.ub[0x0] : => al.ub[0x7] ah.ub[0x01] eflags[0x11,0x11 [all...] |
insn_cmov.def | 1 cmova eflags[0x041,0x000] : r16.uw[12345] r16.uw[0] => 1.uw[12345] 2 cmova eflags[0x041,0x001] : r16.uw[12345] r16.uw[0] => 1.uw[0] 3 cmova eflags[0x041,0x040] : r16.uw[12345] r16.uw[0] => 1.uw[0] 4 cmova eflags[0x041,0x041] : r16.uw[12345] r16.uw[0] => 1.uw[0] 5 cmova eflags[0x041,0x000] : m16.uw[12345] r16.uw[0] => 1.uw[12345] 6 cmova eflags[0x041,0x001] : m16.uw[12345] r16.uw[0] => 1.uw[0] 7 cmova eflags[0x041,0x040] : m16.uw[12345] r16.uw[0] => 1.uw[0] 8 cmova eflags[0x041,0x041] : m16.uw[12345] r16.uw[0] => 1.uw[0] 9 cmovae eflags[0x001,0x000] : r16.uw[12345] r16.uw[0] => 1.uw[12345] 10 cmovae eflags[0x001,0x001] : r16.uw[12345] r16.uw[0] => 1.uw[0 [all...] |
bug152818-x86.c | 50 "sahf \t\n" /* loading our eflags */ \ 73 : "%eax", "%esi", "%ecx", "cc" /* we mess up EFLAGS */); 93 unsigned int eflags; local 123 eflags = 0; 124 pp_eflags ((eflags >> 8) & 0xFF); // scratching off AH 125 printf ("REP %s (EAX = %08X, EFLAGS = %s) => ", i_name, eax, sz_eflags); 140 eax, esi, eflags, resulting_eax, resulting_esi, resulting_eflags, 147 eax, esi, eflags, resulting_eax, resulting_esi, resulting_eflags, 158 eax, esi, eflags, resulting_eax, resulting_esi, resulting_eflags, 167 eax, esi, eflags, resulting_eax, resulting_esi, resulting_eflags [all...] |
/external/valgrind/none/tests/amd64/ |
insn_basic.def | 1 adcb eflags[0x1,0x0] : imm8[12] al.ub[34] => 1.ub[46] 2 adcb eflags[0x1,0x1] : imm8[12] al.ub[34] => 1.ub[47] 3 adcb eflags[0x1,0x0] : imm8[12] bl.ub[34] => 1.ub[46] 4 adcb eflags[0x1,0x1] : imm8[12] bl.ub[34] => 1.ub[47] 5 adcb eflags[0x1,0x0] : imm8[12] m8.ub[34] => 1.ub[46] 6 adcb eflags[0x1,0x1] : imm8[12] m8.ub[34] => 1.ub[47] 7 adcb eflags[0x1,0x0] : r8.ub[12] r8.ub[34] => 1.ub[46] 8 adcb eflags[0x1,0x1] : r8.ub[12] r8.ub[34] => 1.ub[47] 9 adcb eflags[0x1,0x0] : r8.ub[12] m8.ub[34] => 1.ub[46] 10 adcb eflags[0x1,0x1] : r8.ub[12] m8.ub[34] => 1.ub[47 [all...] |
/external/valgrind/memcheck/tests/x86-solaris/ |
context_eflags2.c | 11 #define OBIT(eflags) (!!((eflags) & (1 << 11))) 12 #define SBIT(eflags) (!!((eflags) & (1 << 7))) 31 int eflags; local 63 : "=d" (eflags) 69 Note: This actually fails because the eflags are only approximate 75 if (!OBIT(eflags) || !SBIT(eflags))
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context_eflags.c | 11 #define OBIT(eflags) (!!((eflags) & (1 << 11))) 12 #define SBIT(eflags) (!!((eflags) & (1 << 7))) 27 int eflags; local 58 : "=d" (eflags) 67 printf(" overflow=%d, sign=%d\n", OBIT(eflags), SBIT(eflags));
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/external/llvm/test/CodeGen/MIR/X86/ |
implicit-register-flag.mir | 35 ; CHECK: CMP32ri8 %edi, 10, implicit-def %eflags 36 ; CHECK-NEXT: JG_1 %bb.2.exit, implicit %eflags 37 CMP32ri8 %edi, 10, implicit-def %eflags 38 JG_1 %bb.2.exit, implicit %eflags 41 ; CHECK: %eax = MOV32r0 implicit-def %eflags 42 %eax = MOV32r0 implicit-def %eflags 56 ; CHECK: dead %eax = XOR32rr undef %eax, undef %eax, implicit-def dead %eflags, implicit-def %al 57 dead %eax = XOR32rr undef %eax, undef %eax, implicit-def dead %eflags, implicit-def %al 65 ; CHECK: dead %r15 = XOR64rr undef %r15, undef %r15, implicit-def dead %eflags, implicit-def %r15w 66 dead %r15 = XOR64rr undef %r15, undef %r15, implicit-def dead %eflags, implicit-def %r15 [all...] |
newline-handling.mir | 40 # CHECK: CMP32ri8 %edi, 10, implicit-def %eflags 41 # CHECK-NEXT: JG_1 %bb.2.exit, implicit killed %eflags 44 # CHECK-NEXT: %eax = MOV32r0 implicit-def dead %eflags 57 CMP32ri8 %edi, 10, implicit-def %eflags 59 JG_1 %bb.2.exit, implicit killed %eflags 64 %eax = MOV32r0 implicit-def dead %eflags 84 # CHECK: CMP32ri8 %edi, 10, implicit-def %eflags 85 # CHECK-NEXT: JG_1 %bb.2.exit, implicit killed %eflags 88 # CHECK-NEXT: %eax = MOV32r0 implicit-def dead %eflags 100 CMP32ri8 %edi, 10, implicit-def %eflags [all...] |
expected-different-implicit-register-flag.mir | 25 CMP32ri8 %eax, 10, implicit-def %eflags 26 ; CHECK: [[@LINE+1]]:42: missing implicit register operand 'implicit %eflags' 27 JG_1 %bb.2.exit, implicit-def %eflags 30 %eax = MOV32r0 implicit-def %eflags
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machine-basic-block-operands.mir | 44 CMP32ri8 %eax, 10, implicit-def %eflags 45 JG_1 %bb.2.exit, implicit %eflags 49 %eax = MOV32r0 implicit-def %eflags 65 CMP32ri8 %eax, 10, implicit-def %eflags 66 JG_1 %bb.3, implicit %eflags 69 %eax = MOV32r0 implicit-def %eflags
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cfi-def-cfa-offset.mir | 23 %rsp = SUB64ri32 %rsp, 4040, implicit-def dead %eflags 26 %rsp = ADD64ri32 %rsp, 4040, implicit-def dead %eflags
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dead-register-flag.mir | 21 ; CHECK: %eax = IMUL32rri8 %edi, 11, implicit-def dead %eflags 22 %eax = IMUL32rri8 %edi, 11, implicit-def dead %eflags
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expected-offset-after-cfi-operand.mir | 21 %rsp = SUB64ri32 %rsp, 4040, implicit-def dead %eflags 24 %rsp = ADD64ri32 %rsp, 4040, implicit-def dead %eflags
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large-cfi-offset-number-error.mir | 21 %rsp = SUB64ri32 %rsp, 4040, implicit-def dead %eflags 24 %rsp = ADD64ri32 %rsp, 4040, implicit-def dead %eflags
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basic-block-not-at-start-of-line-error.mir | 28 CMP32ri8 %edi, 10, implicit-def %eflags 29 JG_1 %bb.2.exit, implicit killed %eflags 33 %eax = MOV32r0 implicit-def dead %eflags
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duplicate-register-flag-error.mir | 24 CMP32ri8 %edi, 10, implicit-def %eflags 26 JG_1 %bb.2.exit, implicit implicit %eflags 29 %eax = MOV32r0 implicit-def %eflags
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expected-basic-block-at-start-of-body.mir | 28 CMP32ri8 %edi, 10, implicit-def %eflags 29 JG_1 %bb.2.exit, implicit killed %eflags 32 %eax = MOV32r0 implicit-def dead %eflags
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expected-different-implicit-operand.mir | 25 CMP32ri8 %eax, 10, implicit-def %eflags 26 ; CHECK: [[@LINE+1]]:35: missing implicit register operand 'implicit %eflags' 30 %eax = MOV32r0 implicit-def %eflags
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expected-integer-in-successor-weight.mir | 26 CMP32ri8 %edi, 10, implicit-def %eflags 27 JG_1 %bb.2.exit, implicit killed %eflags 30 %eax = MOV32r0 implicit-def dead %eflags
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expected-newline-at-end-of-list.mir | 29 CMP32ri8 %edi, 10, implicit-def %eflags 30 JG_1 %bb.2.exit, implicit killed %eflags 33 %eax = MOV32r0 implicit-def dead %eflags
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expected-number-after-bb.mir | 24 CMP32ri8 %eax, 10, implicit-def %eflags 26 JG_1 %bb.nah, implicit %eflags 29 %eax = MOV32r0 implicit-def %eflags
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/external/valgrind/memcheck/tests/x86/ |
more_x86_fp.c | 73 unsigned int eflags; local 78 : "=r" (eflags) 80 printf("fcomi(%f %f)=%08x\n", a, b, eflags & (CC_Z | CC_P | CC_C)); 205 #define TEST_FCMOV(a, b, eflags, CC)\ 212 : "0" (a), "u" (b), "g" (eflags));\ 213 printf("fcmov%s eflags=0x%04x-> %f\n", \ 214 CC, eflags, res);\ 220 int eflags, i; local 225 eflags = 0; 227 eflags |= CC_C [all...] |
/external/llvm/lib/Target/X86/ |
X86InstrCMovSetCC.td | 18 let Uses = [EFLAGS], Predicates = [HasCMov], Constraints = "$src1 = $dst", 24 (X86cmov GR16:$src1, GR16:$src2, CondNode, EFLAGS))], 30 (X86cmov GR32:$src1, GR32:$src2, CondNode, EFLAGS))], 36 (X86cmov GR64:$src1, GR64:$src2, CondNode, EFLAGS))], 40 let Uses = [EFLAGS], Predicates = [HasCMov], Constraints = "$src1 = $dst", 46 CondNode, EFLAGS))], IIC_CMOV16_RM>, 52 CondNode, EFLAGS))], IIC_CMOV32_RM>, 58 CondNode, EFLAGS))], IIC_CMOV32_RM>, TB; 59 } // Uses = [EFLAGS], Predicates = [HasCMov], Constraints = "$src1 = $dst" 84 let Uses = [EFLAGS] in [all...] |
/external/strace/linux/x86_64/ |
userent.h | 19 { 8*EFLAGS, "8*EFL" },
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