/toolchain/binutils/binutils-2.25/gas/testsuite/gas/i386/ |
compat.s | 16 fdivrp 17 fdivrp %st(3) 18 fdivrp %st,%st(3)
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intel.e | 5 .*:654: Warning: translating to `fdivrp' 6 .*:663: Warning: translating to `fdivrp st\(3\),st'
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compat-intel.d | 20 [ ]*[a-f0-9]+: de f1 fdivrp st\(1\),st 21 [ ]*[a-f0-9]+: de f3 fdivrp st\(3\),st 22 [ ]*[a-f0-9]+: de f3 fdivrp st\(3\),st
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float.s | 66 fdivrp 67 fdivrp %st(3) 68 fdivrp %st,%st(3)
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compat.d | 23 [ ]*[a-f0-9]+: de f9 fdivrp %st,%st\(1\) 24 [ ]*[a-f0-9]+: de fb fdivrp %st,%st\(3\) 25 [ ]*[a-f0-9]+: de fb fdivrp %st,%st\(3\)
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float.l | 7 .*:58: Warning:.*fdivrp.* 71 .*Warning:.*fdivrp.* 79 66 007e DEF9 [ ]*fdivrp 80 67 0080 DEFB [ ]*fdivrp %st\(3\) 81 68 0082 DEFB [ ]*fdivrp %st,%st\(3\)
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general.s | 138 fdivrp %st(6),%st
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intel.s | 660 fdivrp label 661 fdivrp st(3) label 662 fdivrp st(3),st label 663 fdivrp st,st(3) label
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general.l | 203 138 0152 DEFE fdivrp %st\(6\),%st
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intel.d | [all...] |
/external/llvm/test/MC/X86/ |
intel-syntax-2.s | 31 // CHECK: fdivrp %st(1)
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intel-syntax.s | 503 // CHECK: fdivrp %st(1) 510 fdivrp ST(1), ST(0) label 516 // CHECK: fdivrp %st(1) 523 fdivrp ST(0), ST(1) label 529 // CHECK: fdivrp %st(1) 536 fdivrp ST(1) label 543 // CHECK: fdivrp %st(1) 556 // CHECK: fdivrp %st(1) 563 fdivrp label
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x86-64.s | 295 // CHECK: fdivrp %st(1) 306 fdivrp label 559 fdivrp %st(0), %st(1) // CHECK: encoding: [0xde,0xf9] label 560 fdivrp %st(1), %st(0) // CHECK: encoding: [0xde,0xf9] label 1293 // CHECK: fdivrp %st(1) 1299 fdivrp %st(0), %st(1) label 1306 // CHECK: fdivrp %st(1) 1312 fdivrp %st(1), %st(0) label 1319 // CHECK: fdivrp %st(1) 1325 fdivrp %st(1 label 1338 fdivrp label [all...] |
/external/llvm/test/MC/Disassembler/X86/ |
fp-stack.txt | 964 # CHECK: fdivrp %st(0) 967 # CHECK: fdivrp %st(1) 970 # CHECK: fdivrp %st(2) 973 # CHECK: fdivrp %st(3) 976 # CHECK: fdivrp %st(4) 979 # CHECK: fdivrp %st(5) 982 # CHECK: fdivrp %st(6) 985 # CHECK: fdivrp %st(7)
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/external/valgrind/none/tests/amd64/ |
insn_fpu.def | 169 fdivrp st0.ps[1234.5678] st2.ps[8765.4321] => st1.ps[7.10000058320005] 170 fdivrp st0.ps[-1234.5678] st2.ps[8765.4321] => st1.ps[-7.10000058320005] 171 fdivrp st0.ps[1234.5678] st2.ps[-8765.4321] => st1.ps[-7.10000058320005] 172 fdivrp st0.ps[-1234.5678] st2.ps[-8765.4321] => st1.ps[7.10000058320005] 173 fdivrp st0.pd[1234567.7654321] st2.pd[7654321.1234567] => st1.pd[6.20000079200001] 174 fdivrp st0.pd[-1234567.7654321] st2.pd[7654321.1234567] => st1.pd[-6.20000079200001] 175 fdivrp st0.pd[1234567.7654321] st2.pd[-7654321.1234567] => st1.pd[-6.20000079200001] 176 fdivrp st0.pd[-1234567.7654321] st2.pd[-7654321.1234567] => st1.pd[6.20000079200001] 177 fdivrp st0.ps[1234.5678] st1.ps[8765.4321] : => st0.ps[7.10000058320005] 178 fdivrp st0.ps[-1234.5678] st1.ps[8765.4321] : => st0.ps[-7.10000058320005 [all...] |
/external/valgrind/none/tests/x86/ |
insn_fpu.def | 169 fdivrp st0.ps[1234.5678] st2.ps[8765.4321] => st1.ps[7.10000058320005] 170 fdivrp st0.ps[-1234.5678] st2.ps[8765.4321] => st1.ps[-7.10000058320005] 171 fdivrp st0.ps[1234.5678] st2.ps[-8765.4321] => st1.ps[-7.10000058320005] 172 fdivrp st0.ps[-1234.5678] st2.ps[-8765.4321] => st1.ps[7.10000058320005] 173 fdivrp st0.pd[1234567.7654321] st2.pd[7654321.1234567] => st1.pd[6.20000079200001] 174 fdivrp st0.pd[-1234567.7654321] st2.pd[7654321.1234567] => st1.pd[-6.20000079200001] 175 fdivrp st0.pd[1234567.7654321] st2.pd[-7654321.1234567] => st1.pd[-6.20000079200001] 176 fdivrp st0.pd[-1234567.7654321] st2.pd[-7654321.1234567] => st1.pd[6.20000079200001] 177 fdivrp st0.ps[1234.5678] st1.ps[8765.4321] : => st0.ps[7.10000058320005] 178 fdivrp st0.ps[-1234.5678] st1.ps[8765.4321] : => st0.ps[-7.10000058320005 [all...] |
/toolchain/binutils/binutils-2.25/include/opcode/ |
i386.h | 48 generate nonsense fsubp, fsubrp, fdivp and fdivrp with operands
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ChangeLog-9103 | [all...] |
/prebuilts/go/darwin-x86/src/cmd/internal/rsc.io/x86/x86asm/ |
gnu.go | 22 case FDIV, FDIVR, FSUB, FSUBR, FDIVP, FDIVRP, FSUBP, FSUBRP: 41 inst.Op = FDIVRP 42 case FDIVRP:
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/prebuilts/go/linux-x86/src/cmd/internal/rsc.io/x86/x86asm/ |
gnu.go | 22 case FDIV, FDIVR, FSUB, FSUBR, FDIVP, FDIVRP, FSUBP, FSUBRP: 41 inst.Op = FDIVRP 42 case FDIVRP:
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/bionic/libm/x86/ |
libm_tancot_huge.S | 261 fdivrp %st, %st(2) 284 fdivrp %st, %st(1)
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/external/mesa3d/src/mesa/x86/ |
assyntax.h | 718 #define FDIVRP(a, b) CHOICE(fdivrp ARG2(a,b), fdivrp ARG2(a,b), fdivrp ARG2(b,a)) [all...] |
/external/elfutils/libcpu/defs/ |
i386 | 307 11011110,11111{freg}:fdivrp %st,{freg} 318 11011110,11110{freg}:fdivrp %st,{freg} 320 `11011110,11110001:fdivrp [all...] |
/external/google-breakpad/src/third_party/libdisasm/ |
ia32_opcode_tables.c | [all...] |
/external/valgrind/VEX/useful/ |
hd_fpu.c | [all...] |