| /external/llvm/test/Transforms/InstCombine/ |
| x86-pmovzx.ll | 4 declare <2 x i64> @llvm.x86.sse41.pmovzxbq(<16 x i8>) nounwind readnone
11 declare <4 x i64> @llvm.x86.avx2.pmovzxbq(<16 x i8>) nounwind readnone
37 %res = call <2 x i64> @llvm.x86.sse41.pmovzxbq(<16 x i8> %v)
97 %res = call <4 x i64> @llvm.x86.avx2.pmovzxbq(<16 x i8> %v)
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/i386/ |
| sse4_1.s | 82 pmovzxbq %xmm1,%xmm0
83 pmovzxbq (%ecx),%xmm0
177 pmovzxbq xmm0,xmm1
178 pmovzxbq xmm0,WORD PTR [ecx]
|
| x86-64-sse4_1.s | 90 pmovzxbq %xmm1,%xmm0
91 pmovzxbq (%rcx),%xmm0
193 pmovzxbq xmm0,xmm1
194 pmovzxbq xmm0,WORD PTR [rcx]
|
| simd.s | 77 pmovzxbq (%eax),%xmm0
176 pmovzxbq xmm0,WORD PTR [eax] label
|
| x86-64-simd.s | 97 pmovzxbq (%rax),%xmm0
224 pmovzxbq xmm0,WORD PTR [rax] label
|
| sse4_1-intel.d | 87 [ ]*[a-f0-9]+: 66 0f 38 32 c1 pmovzxbq xmm0,xmm1
88 [ ]*[a-f0-9]+: 66 0f 38 32 01 pmovzxbq xmm0,WORD PTR \[ecx\]
180 [ ]*[a-f0-9]+: 66 0f 38 32 c1 pmovzxbq xmm0,xmm1
181 [ ]*[a-f0-9]+: 66 0f 38 32 01 pmovzxbq xmm0,WORD PTR \[ecx\]
|
| sse4_1.d | 86 [ ]*[0-9a-f]+: 66 0f 38 32 c1 pmovzxbq %xmm1,%xmm0
87 [ ]*[0-9a-f]+: 66 0f 38 32 01 pmovzxbq \(%ecx\),%xmm0
179 [ ]*[a-f0-9]+: 66 0f 38 32 c1 pmovzxbq %xmm1,%xmm0
180 [ ]*[a-f0-9]+: 66 0f 38 32 01 pmovzxbq \(%ecx\),%xmm0
|
| x86-64-sse4_1-intel.d | 95 [ ]*[a-f0-9]+: 66 0f 38 32 c1 pmovzxbq xmm0,xmm1
96 [ ]*[a-f0-9]+: 66 0f 38 32 01 pmovzxbq xmm0,WORD PTR \[rcx\]
196 [ ]*[a-f0-9]+: 66 0f 38 32 c1 pmovzxbq xmm0,xmm1
197 [ ]*[a-f0-9]+: 66 0f 38 32 01 pmovzxbq xmm0,WORD PTR \[rcx\]
|
| x86-64-sse4_1.d | 94 [ ]*[a-f0-9]+: 66 0f 38 32 c1 pmovzxbq %xmm1,%xmm0
95 [ ]*[a-f0-9]+: 66 0f 38 32 01 pmovzxbq \(%rcx\),%xmm0
195 [ ]*[a-f0-9]+: 66 0f 38 32 c1 pmovzxbq %xmm1,%xmm0
196 [ ]*[a-f0-9]+: 66 0f 38 32 01 pmovzxbq \(%rcx\),%xmm0
|
| sse2avx.s | 606 pmovzxbq %xmm4,%xmm6
607 pmovzxbq (%ecx),%xmm4
1267 pmovzxbq xmm6,xmm4
1268 pmovzxbq xmm4,WORD PTR [ecx]
|
| x86-64-sse2avx.s | 642 pmovzxbq %xmm4,%xmm6
643 pmovzxbq (%rcx),%xmm4
1346 pmovzxbq xmm6,xmm4
1347 pmovzxbq xmm4,WORD PTR [rcx]
|
| simd-intel.d | 83 [ ]*[a-f0-9]+: 66 0f 38 32 00 pmovzxbq xmm0,WORD PTR \[eax\]
176 [ ]*[a-f0-9]+: 66 0f 38 32 00 pmovzxbq xmm0,WORD PTR \[eax\]
|
| simd-suffix.d | 83 [ ]*[a-f0-9]+: 66 0f 38 32 00 pmovzxbq \(%eax\),%xmm0
176 [ ]*[a-f0-9]+: 66 0f 38 32 00 pmovzxbq \(%eax\),%xmm0
|
| simd.d | 82 [ ]*[a-f0-9]+: 66 0f 38 32 00 pmovzxbq \(%eax\),%xmm0
175 [ ]*[a-f0-9]+: 66 0f 38 32 00 pmovzxbq \(%eax\),%xmm0
|
| /external/llvm/test/CodeGen/X86/ |
| trunc-ext-ld-st.ll | 5 ;CHECK: pmovzxbq
|
| avx2-pmovxrm-intrinsics.ll | 71 %2 = call <4 x i64> @llvm.x86.avx2.pmovzxbq(<16 x i8> %1)
102 declare <4 x i64> @llvm.x86.avx2.pmovzxbq(<16 x i8>)
|
| sse41-pmovxrm-intrinsics.ll | 134 ; SSE41-NEXT: pmovzxbq {{.*#+}} xmm0 = mem[0],zero,zero,zero,zero,zero,zero,zero,mem[1],zero,zero,zero,zero,zero,zero,zero
142 %2 = call <2 x i64> @llvm.x86.sse41.pmovzxbq(<16 x i8> %1)
194 declare <2 x i64> @llvm.x86.sse41.pmovzxbq(<16 x i8>)
|
| sse41-intrinsics-x86.ll | 174 ; CHECK: pmovzxbq
175 %res = call <2 x i64> @llvm.x86.sse41.pmovzxbq(<16 x i8> %a0) ; <<2 x i64>> [#uses=1]
178 declare <2 x i64> @llvm.x86.sse41.pmovzxbq(<16 x i8>) nounwind readnone
|
| vector-zext.ll | 176 ; SSE41-NEXT: pmovzxbq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,zero,zero,zero,zero,xmm0[1],zero,zero,zero,zero,zero,zero,zero
210 ; SSE41-NEXT: pmovzxbq {{.*#+}} xmm2 = xmm0[0],zero,zero,zero,zero,zero,zero,zero,xmm0[1],zero,zero,zero,zero,zero,zero,zero
212 ; SSE41-NEXT: pmovzxbq {{.*#+}} xmm1 = xmm0[0],zero,zero,zero,zero,zero,zero,zero,xmm0[1],zero,zero,zero,zero,zero,zero,zero
480 ; SSE41-NEXT: pmovzxbq {{.*#+}} xmm0 = mem[0],zero,zero,zero,zero,zero,zero,zero,mem[1],zero,zero,zero,zero,zero,zero,zero
550 ; SSE41-NEXT: pmovzxbq {{.*#+}} xmm0 = mem[0],zero,zero,zero,zero,zero,zero,zero,mem[1],zero,zero,zero,zero,zero,zero,zero
551 ; SSE41-NEXT: pmovzxbq {{.*#+}} xmm1 = mem[0],zero,zero,zero,zero,zero,zero,zero,mem[1],zero,zero,zero,zero,zero,zero,zero
[all...] |
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/i386/ilp32/ |
| x86-64-sse4_1-intel.d | 95 [ ]*[a-f0-9]+: 66 0f 38 32 c1 pmovzxbq xmm0,xmm1
96 [ ]*[a-f0-9]+: 66 0f 38 32 01 pmovzxbq xmm0,WORD PTR \[rcx\]
196 [ ]*[a-f0-9]+: 66 0f 38 32 c1 pmovzxbq xmm0,xmm1
197 [ ]*[a-f0-9]+: 66 0f 38 32 01 pmovzxbq xmm0,WORD PTR \[rcx\]
|
| x86-64-sse4_1.d | 95 [ ]*[a-f0-9]+: 66 0f 38 32 c1 pmovzxbq %xmm1,%xmm0
96 [ ]*[a-f0-9]+: 66 0f 38 32 01 pmovzxbq \(%rcx\),%xmm0
196 [ ]*[a-f0-9]+: 66 0f 38 32 c1 pmovzxbq %xmm1,%xmm0
197 [ ]*[a-f0-9]+: 66 0f 38 32 01 pmovzxbq \(%rcx\),%xmm0
|
| x86-64-simd-intel.d | 103 [ ]*[a-f0-9]+: 66 0f 38 32 00 pmovzxbq xmm0,WORD PTR \[rax\]
222 [ ]*[a-f0-9]+: 66 0f 38 32 00 pmovzxbq xmm0,WORD PTR \[rax\]
|
| x86-64-simd-suffix.d | 103 [ ]*[a-f0-9]+: 66 0f 38 32 00 pmovzxbq \(%rax\),%xmm0
222 [ ]*[a-f0-9]+: 66 0f 38 32 00 pmovzxbq \(%rax\),%xmm0
|
| x86-64-simd.d | 103 [ ]*[a-f0-9]+: 66 0f 38 32 00 pmovzxbq \(%rax\),%xmm0
222 [ ]*[a-f0-9]+: 66 0f 38 32 00 pmovzxbq \(%rax\),%xmm0
|
| /external/clang/test/CodeGen/ |
| sse41-builtins.c | 125 // CHECK: call <2 x i64> @llvm.x86.sse41.pmovzxbq(<16 x i8> {{.*}})
|
