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  /art/runtime/interpreter/mterp/mips/
op_div_long.S 1 %include "mips/binopWide.S" {"result0":"v0", "result1":"v1", "instr":"JAL(__divdi3)", "chkzero":"1"}
op_div_long_2addr.S 1 %include "mips/binopWide2addr.S" {"result0":"v0", "result1":"v1", "instr":"JAL(__divdi3)", "chkzero":"1"}
op_rem_long.S 1 %include "mips/binopWide.S" { "result0":"v0", "result1":"v1", "instr":"JAL(__moddi3)", "chkzero":"1"}
op_rem_long_2addr.S 1 %include "mips/binopWide2addr.S" { "result0":"v0", "result1":"v1", "instr":"JAL(__moddi3)", "chkzero":"1"}
op_add_long_2addr.S 4 %include "mips/binopWide2addr.S" { "result0":"v0", "result1":"v1", "preinstr":"addu v0, a2, a0", "instr":"addu a1, a3, a1; sltu v1, v0, a2; addu v1, v1, a1" }
op_neg_long.S 1 %include "mips/unopWide.S" {"result0":"v0", "result1":"v1", "preinstr":"negu v0, a0", "instr":"negu v1, a1; sltu a0, zero, v0; subu v1, v1, a0"}
op_sub_long_2addr.S 4 %include "mips/binopWide2addr.S" { "result0":"v0", "result1":"v1", "preinstr":"subu v0, a0, a2", "instr":"subu v1, a1, a3; sltu a0, a0, v0; subu v1, v1, a0" }
unop.S 1 %default {"preinstr":"", "result0":"a0"}
18 SET_VREG_GOTO($result0, t0, t1) # vAA <- result0
op_add_long.S 9 %include "mips/binopWide.S" { "result0":"v0", "result1":"v1", "preinstr":"addu v0, a2, a0", "instr":"addu a1, a3, a1; sltu v1, v0, a2; addu v1, v1, a1" }
op_sub_long.S 8 %include "mips/binopWide.S" { "result0":"v0", "result1":"v1", "preinstr":"subu v0, a0, a2", "instr":"subu v1, a1, a3; sltu a0, a0, v0; subu v1, v1, a0" }
unopWide.S 1 %default {"preinstr":"", "result0":"a0", "result1":"a1"}
18 SET_VREG64($result0, $result1, rOBJ) # vAA <- a0/a1
unopWider.S 1 %default {"preinstr":"", "result0":"a0", "result1":"a1"}
17 SET_VREG64($result0, $result1, rOBJ) # vA/vA+1 <- a0/a1
binopWide.S 1 %default {"preinstr":"", "result0":"a0", "result1":"a1", "chkzero":"0", "arg0":"a0", "arg1":"a1", "arg2":"a2", "arg3":"a3"}
34 SET_VREG64_GOTO($result0, $result1, rOBJ, t0) # vAA/vAA+1 <- $result0/$result1
binopWide2addr.S 1 %default {"preinstr":"", "result0":"a0", "result1":"a1", "chkzero":"0", "arg0":"a0", "arg1":"a1", "arg2":"a2", "arg3":"a3"}
31 SET_VREG64($result0, $result1, rOBJ) # vAA/vAA+1 <- $result0/$result1
unopNarrower.S 22 SET_VREG_F(fv0, rOBJ) # vA <- result0
  /art/runtime/interpreter/mterp/arm/
op_rem_long.S 2 %include "arm/binopWide.S" {"instr":"bl __aeabi_ldivmod", "result0":"r2", "result1":"r3", "chkzero":"1"}
op_rem_long_2addr.S 2 %include "arm/binopWide2addr.S" {"instr":"bl __aeabi_ldivmod", "result0":"r2", "result1":"r3", "chkzero":"1"}
binopWide.S 1 %default {"preinstr":"", "result0":"r0", "result1":"r1", "chkzero":"0"}
36 stmia r9, {$result0,$result1} @ vAA/vAA+1<- $result0/$result1
binopWide2addr.S 1 %default {"preinstr":"", "result0":"r0", "result1":"r1", "chkzero":"0"}
32 stmia r9, {$result0,$result1} @ vAA/vAA+1<- $result0/$result1
  /external/llvm/test/CodeGen/AMDGPU/
llvm.AMDGPU.div_scale.ll 11 ; SI: v_div_scale_f32 [[RESULT0:v[0-9]+]], [[RESULT1:s\[[0-9]+:[0-9]+\]]], [[B]], [[B]], [[A]]
12 ; SI: buffer_store_dword [[RESULT0]]
23 %result0 = extractvalue { float, i1 } %result, 0
24 store float %result0, float addrspace(1)* %out, align 4
31 ; SI: v_div_scale_f32 [[RESULT0:v[0-9]+]], [[RESULT1:s\[[0-9]+:[0-9]+\]]], [[A]], [[B]], [[A]]
32 ; SI: buffer_store_dword [[RESULT0]]
43 %result0 = extractvalue { float, i1 } %result, 0
44 store float %result0, float addrspace(1)* %out, align 4
51 ; SI: v_div_scale_f64 [[RESULT0:v\[[0-9]+:[0-9]+\]]], [[RESULT1:s\[[0-9]+:[0-9]+\]]], [[B]], [[B]], [[A]]
52 ; SI: buffer_store_dwordx2 [[RESULT0]]
    [all...]
  /external/slf4j/slf4j-ext/src/test/java/org/slf4j/
NDCTest.java 54 String result0 = NDC.pop(); local
56 assertEquals("a", result0);
  /system/bt/service/test/
util_unittest.cpp 38 const bt_bdaddr_t result0 = {{ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }}; local
39 EXPECT_EQ(0, memcmp(&addr, &result0, sizeof(addr)));
  /external/skia/tests/
SrcOverTest.cpp 37 unsigned result0 = test_srcover0(0xFF, i); local
40 opaqueCounter0 += (result0 == 0xFF);
  /toolchain/binutils/binutils-2.25/cpu/
sh64-media.cpu 856 (QI result3) (QI result2) (QI result1) (QI result0))
857 (set result0 (expr (subword QI rm 7) (subword QI rn 7)))
866 result1 result0))))
869 (sequence ((HI result3) (HI result2) (HI result1) (HI result0))
870 (set result0 (expr (subword HI rm 3) (subword HI rn 3)))
874 (set rd (-join-hi result3 result2 result1 result0))))
877 (sequence ((HI result3) (HI result2) (HI result1) (HI result0))
878 (set result0 (expr (subword HI rm 3)))
882 (set rd (-join-hi result3 result2 result1 result0))))
885 (sequence ((SI result1) (SI result0))
    [all...]
  /external/vboot_reference/firmware/lib/
tpm_bootmode.c 141 uint32_t result0, result1 = 0; local
155 result0 = TlclExtend(BOOT_MODE_PCR, in_digest, out_digest);
157 BOOT_MODE_PCR, result0));
168 return result0 || result1;

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