| /external/llvm/test/CodeGen/Hexagon/ |
| ashift-left-right.ll | 7 %shl1 = shl i32 16, %a
9 %ret = mul i32 %shl1, %shl2
17 %shl1 = ashr i32 16, %a
19 %ret = mul i32 %shl1, %shl2
|
| /external/llvm/test/CodeGen/Mips/ |
| micromips-shift.ll | 16 %shl1 = shl i32 %1, 10
17 store i32 %shl1, i32* @d, align 4
|
| /external/llvm/test/CodeGen/PowerPC/ |
| ldtoc-inv.ll | 23 %shl1 = shl i32 %0, %step_size
24 %idxprom2 = sext i32 %shl1 to i64
|
| ppc-shrink-wrapping.ll | 646 %shl1.i = shl i32 %or.i, 7
648 %or2.i = or i32 %shl1.i, %2
|
| /external/llvm/test/CodeGen/X86/ |
| targetLoweringGeneric.ll | 23 %shl1 = shl i32 %xor3, %i32In4
24 %sub1 = sub i32 %or2, %shl1
|
| vec_shift4.ll | 3 define <2 x i64> @shl1(<4 x i32> %r, <4 x i32> %a) nounwind readnone ssp {
|
| legalize-shift-64.ll | 78 %shl1 = shl i64 1, %sh_prom
79 %cmp = icmp ne i64 %shl1, 4294967296
|
| sse2-vector-shifts.ll | 288 %shl1 = shl <4 x i32> %shl0, <i32 4, i32 4, i32 4, i32 4>
289 ret <4 x i32> %shl1
298 %shl1 = shl <4 x i32> %shl0, <i32 4, i32 4, i32 4, i32 4>
299 ret <4 x i32> %shl1
309 %shl1 = shl <4 x i32> %shl0, <i32 5, i32 5, i32 5, i32 5>
310 ret <4 x i32> %shl1
344 %shl1 = shl <4 x i32> %ext, <i32 17, i32 17, i32 17, i32 17>
345 ret <4 x i32> %shl1
|
| mmx-coalescing.ll | 17 %shl1 = shl i32 %C, %B
|
| /external/llvm/test/Transforms/InstCombine/ |
| nsw.ll | 31 ; CHECK-LABEL: @shl1(
34 define i64 @shl1(i64 %X, i64* %P) nounwind {
|
| rem.ll | 193 ; CHECK-NEXT: [[SHL1:%.*]] = shl i32 1, %x
195 ; CHECK-NEXT: [[AND:%.*]] = and i32 [[SHL1]], [[SHL2]]
196 ; CHECK-NEXT: [[ADD:%.*]] = add i32 [[AND]], [[SHL1]]
|
| mul.ll | 254 ; CHECK: %[[shl1:.*]] = shl i32 1, %A
255 ; CHECK-NEXT: %[[shl2:.*]] = shl i32 %[[shl1]], %A
|
| shift.ll | 584 %shl1 = shl i32 1, %b
585 %shl2 = shl i32 %shl1, 2
|
| /art/test/538-checker-embed-constants/src/ |
| Main.java | 263 /// CHECK-START-ARM: long Main.shl1(long) disassembly (after)
267 /// CHECK-START-ARM: long Main.shl1(long) disassembly (after)
270 /// CHECK-START-X86: long Main.shl1(long) disassembly (after)
274 /// CHECK-START-X86: long Main.shl1(long) disassembly (after)
277 public static long shl1(long arg) { method in class:Main
527 assertLongEquals(shl1(longArg), 0x2468acf10eca8642L); method
533 assertLongEquals(shl1(~longArg), 0xdb97530ef13579bcL); method
|
| /external/llvm/test/CodeGen/AArch64/ |
| arm64-bitfield-extract.ll | 309 %shl1 = shl i32 %or1, 2
310 store i32 %shl1, i32* %y, align 8
339 %shl1 = shl i64 %or1, 2
340 store i64 %shl1, i64* %y, align 8
|
| /external/llvm/test/Transforms/Inline/ |
| inline_minisize.ll | 116 %shl1 = shl i32 %tmp3, 1
117 %add = add nsw i32 %shl1, 13
|
| /external/v8/test/webkit/fast/js/kde/ |
| md5-1.js | 72 function shl1(a) { function
87 for (var i=0;i<b;i++) a=shl1(a);
|
| /external/llvm/test/Transforms/InstSimplify/ |
| compare.ll | 336 define i1 @shl1(i32 %x) {
337 ; CHECK-LABEL: @shl1(
|
| /bionic/libc/arch-x86/atom/string/ |
| ssse3-strcpy-atom.S | 240 je L(Shl1)
419 L(Shl1):
[all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| DAGCombiner.cpp | [all...] |
