| /art/test/451-spill-splot/ |
| info.txt | 2 way it spills intervals of different types.
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| /external/llvm/test/CodeGen/SystemZ/ |
| alias-01.ll | 5 ; Check that there are no spills.
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| /external/llvm/test/CodeGen/X86/ |
| 2003-08-03-CallArgLiveRanges.ll | 5 ; cause spills!
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| sink-cheap-instructions.ll | 2 ; RUN: llc < %s -mtriple=x86_64-linux -sink-insts-to-avoid-spills | FileCheck %s -check-prefix=SINK
5 ; spills.
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| x86-32-intrcc.ll | 8 ; Spills eax, putting original esp at +4.
28 ; Spills eax and ecx, putting original esp at +8. Stack is adjusted up another 4 bytes
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| 2008-10-27-CoalescerBug.ll | 3 ; Now this test spills one register. But a reload in the loop is cheaper than
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| x86-64-intrcc.ll | 8 ; Spills rax, putting original esp at +8.
28 ; Spills rax and rcx, putting original rsp at +16. Stack is adjusted up another 8 bytes
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| /external/llvm/test/CodeGen/Thumb2/ |
| aligned-spill.ll | 1 ; RUN: llc < %s -mcpu=cortex-a8 -align-neon-spills=0 | FileCheck %s
2 ; RUN: llc < %s -mcpu=cortex-a8 -align-neon-spills=1 | FileCheck %s --check-prefix=NEON
27 ; Stack pointer must be updated before the spills.
32 ; This could legally happen before the spills.
58 ; Stack pointer must be updated before the spills.
85 ; Stack pointer must be updated before the spills.
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| /art/runtime/entrypoints/quick/ |
| quick_trampoline_entrypoints_test.cc | 61 << type << " core spills=" << std::hex << frame_info.CoreSpillMask() << " fp spills="
71 << " core spills=" << std::hex << frame_info.CoreSpillMask()
72 << " fp spills=" << frame_info.FpSpillMask() << std::dec << " ISA " << isa;
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| /external/llvm/test/CodeGen/SPARC/ |
| spillsize.ll | 6 ; This function spills two values: %p and the materialized large constant.
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| spill.ll | 3 ;; Ensure that spills and reloads work for various types on
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| /external/llvm/lib/CodeGen/ |
| LiveInterval.cpp | [all...] |
| InlineSpiller.cpp | 1 //===-------- InlineSpiller.cpp - Insert spills and restores inline -------===//
11 // inserting spills and restores in VirtRegMap.
44 STATISTIC(NumSpills, "Number of spills inserted");
45 STATISTIC(NumSpillsRemoved, "Number of spills removed");
51 STATISTIC(NumOmitReloadSpill, "Number of omitted spills of reloads");
52 STATISTIC(NumHoists, "Number of hoisted spills");
230 // besides copies to/from Reg or spills/fills. We accept:
273 // Main register always spills.
441 // Also hoist spills to blocks with smaller loop depth, but make sure
732 // any later spills of the same value
[all...] |
| /external/llvm/test/CodeGen/ARM/ |
| gpr-paired-spill-thumbinst.ll | 4 ; This test makes sure spills of 64-bit pairs in Thumb mode actually
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| gpr-paired-spill.ll | 26 ; offset from sp can be generated), so we need two spills.
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| neon_spill.ll | 5 ; This test case spills a QQQQ register.
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| subreg-remat.ll | 10 ; When %vreg6 spills, the VLDRS constant pool load cannot be rematerialized
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| vector-spilling.ll | 5 ; This test will generate spills/fills using vldmia instructions that access 24 bytes of memory.
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| /external/llvm/test/CodeGen/PowerPC/ |
| frame-size.ll | 11 ; will fail the small-frame-size check and the function has spills).
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| /external/llvm/test/Transforms/SLPVectorizer/AArch64/ |
| load-store-q.ll | 6 ; spills and fills. This is the case for <2 x double>,
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| /art/runtime/arch/x86_64/ |
| jni_entrypoints_x86_64.S | 23 // Save callee and GPR args, mixed together to agree with core spills bitmap.
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| /art/runtime/arch/ |
| arch_test.cc | 54 << type << " core spills=" << std::hex << frame_info.CoreSpillMask() << " fp spills="
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| instruction_set.h | 171 LOG(FATAL) << "ISA kNone does not have spills.";
196 LOG(FATAL) << "ISA kNone does not have spills.";
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| /external/llvm/lib/Target/Sparc/ |
| SparcSubtarget.h | 88 /// spills and arguments.
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| /external/v8/test/mjsunit/regress/ |
| regress-r4998.js | 33 // Calling foo() spills the virtual frame.
|
