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  /art/test/608-checker-unresolved-lse/
info.txt 2 which used to wrongly remove field stores in the presence of
  /external/valgrind/memcheck/tests/
cond_st.vgtest 2 args: stores
  /art/test/076-boolean-put/
info.txt 1 This checks a case where javac generates code that stores a byte into a
  /external/icu/icu4c/source/common/unicode/
icudataver.h 32 * Retrieves the data version from icuver and stores it in dataVersionFillin.
35 * @param status stores the error code from the calls to resource bundle
  /toolchain/binutils/binutils-2.25/gas/testsuite/gas/epiphany/
badpostmod.s 6 strb r12,[r12],r3 ; stores are okay
  /external/clang/test/Headers/
altivec-intrin.c 12 vector unsigned char l = vec_lvsl (0, &x[1]); // expected-warning {{is deprecated: use assignment for unaligned little endian loads/stores}}
13 vector unsigned char r = vec_lvsr (0, &x[1]); // expected-warning {{is deprecated: use assignment for unaligned little endian loads/stores}}
  /packages/apps/Nfc/nci/jni/extns/pn54x/src/mifare/
phFriNfc_SmtCrdFmt.h 62 uint8_t Default_KeyA_OR_B[6]; /* Stores the Default KeyA and KeyB values */
69 uint16_t CurrentBlock; /* Stores the current block */
70 uint8_t NoOfDevices; /* Stores the current block */
93 uint8_t CardType; /* Stores the type of the smart card */
95 uint8_t CardState; /* Stores the card state */
102 NFCSTATUS FmtProcStatus; /* Stores the output/result of the format procedure */
103 phFriNfc_sNdefSmtCrdFmt_AddInfo_t AddInfo; /* Stores Additional Information needed to format the different types of tags*/
104 uint8_t TLVMsg[PH_FRINFC_SMTCRDFMT_MAX_TLV_TYPE_SUPPORTED][8]; /* Stores NDEF message TLV */
  /external/llvm/test/CodeGen/Hexagon/
dualstore.ll 2 ; Check that we generate dual stores in one packet in V4
  /external/llvm/test/CodeGen/SystemZ/
atomic-store-01.ll 1 ; Test 8-bit atomic stores.
atomic-store-02.ll 1 ; Test 16-bit atomic stores.
atomic-store-03.ll 1 ; Test 32-bit atomic stores.
atomic-store-04.ll 1 ; Test 64-bit atomic stores.
vec-move-03.ll 1 ; Test vector stores.
5 ; Test v16i8 stores.
14 ; Test v8i16 stores.
23 ; Test v4i32 stores.
32 ; Test v2i64 stores.
41 ; Test v4f32 stores.
50 ; Test v2f64 stores.
113 ; Test v2i8 stores.
122 ; Test v4i8 stores.
131 ; Test v8i8 stores
    [all...]
  /external/llvm/test/MC/Disassembler/AArch64/
ldp-offset-predictable.txt 4 # Stores are OK.
  /external/selinux/libselinux/man/man3/
init_selinuxmnt.3 21 that stores the selinuxfs mountpoint.
  /external/tlsdate/src/
test-bio.h 2 * test-bio.h - test BIO that stores reads/writes
  /external/llvm/test/Analysis/CostModel/AArch64/
store.ll 5 ; Stores of <2 x i64> should be expensive because we don't split them and
6 ; and unaligned 16b stores have bad performance.
10 ; We scalarize the loads/stores because there is no vector register name for
  /external/webrtc/webrtc/video/
report_block_stats.h 30 // Updates stats and stores report blocks.
34 // Updates stats and stores report block.
45 // Stores the report block.
  /prebuilts/go/darwin-x86/src/sync/atomic/
doc.go 55 // SwapInt32 atomically stores new into *addr and returns the previous *addr value.
58 // SwapInt64 atomically stores new into *addr and returns the previous *addr value.
61 // SwapUint32 atomically stores new into *addr and returns the previous *addr value.
64 // SwapUint64 atomically stores new into *addr and returns the previous *addr value.
67 // SwapUintptr atomically stores new into *addr and returns the previous *addr value.
70 // SwapPointer atomically stores new into *addr and returns the previous *addr value.
128 // StoreInt32 atomically stores val into *addr.
131 // StoreInt64 atomically stores val into *addr.
134 // StoreUint32 atomically stores val into *addr.
137 // StoreUint64 atomically stores val into *addr
    [all...]
  /prebuilts/go/linux-x86/src/sync/atomic/
doc.go 55 // SwapInt32 atomically stores new into *addr and returns the previous *addr value.
58 // SwapInt64 atomically stores new into *addr and returns the previous *addr value.
61 // SwapUint32 atomically stores new into *addr and returns the previous *addr value.
64 // SwapUint64 atomically stores new into *addr and returns the previous *addr value.
67 // SwapUintptr atomically stores new into *addr and returns the previous *addr value.
70 // SwapPointer atomically stores new into *addr and returns the previous *addr value.
128 // StoreInt32 atomically stores val into *addr.
131 // StoreInt64 atomically stores val into *addr.
134 // StoreUint32 atomically stores val into *addr.
137 // StoreUint64 atomically stores val into *addr
    [all...]
  /external/v8/src/crankshaft/
hydrogen-store-elimination.cc 14 // Performs a block-by-block local analysis for removable stores.
41 // Remove any unobserved stores overwritten by this store.
45 // Observe any unobserved stores on this object + field.
73 // Only non-transitioning stores are removable.
101 TRACE(("-- Observed stores at I%d (%s might deoptimize)\n",
107 TRACE(("-- Observed stores at I%d (%s might GC)\n",
113 TRACE(("-- Observed stores at I%d (GVN flags of %s)\n",
  /system/extras/simpleperf/
event_type_table.h 25 {"L1-dcache-stores", PERF_TYPE_HW_CACHE, ((PERF_COUNT_HW_CACHE_L1D) | (PERF_COUNT_HW_CACHE_OP_WRITE << 8) | (PERF_COUNT_HW_CACHE_RESULT_ACCESS << 16))},
31 {"L1-icache-stores", PERF_TYPE_HW_CACHE, ((PERF_COUNT_HW_CACHE_L1I) | (PERF_COUNT_HW_CACHE_OP_WRITE << 8) | (PERF_COUNT_HW_CACHE_RESULT_ACCESS << 16))},
37 {"LLC-stores", PERF_TYPE_HW_CACHE, ((PERF_COUNT_HW_CACHE_LL) | (PERF_COUNT_HW_CACHE_OP_WRITE << 8) | (PERF_COUNT_HW_CACHE_RESULT_ACCESS << 16))},
43 {"dTLB-stores", PERF_TYPE_HW_CACHE, ((PERF_COUNT_HW_CACHE_DTLB) | (PERF_COUNT_HW_CACHE_OP_WRITE << 8) | (PERF_COUNT_HW_CACHE_RESULT_ACCESS << 16))},
49 {"iTLB-stores", PERF_TYPE_HW_CACHE, ((PERF_COUNT_HW_CACHE_ITLB) | (PERF_COUNT_HW_CACHE_OP_WRITE << 8) | (PERF_COUNT_HW_CACHE_RESULT_ACCESS << 16))},
55 {"branch-stores", PERF_TYPE_HW_CACHE, ((PERF_COUNT_HW_CACHE_BPU) | (PERF_COUNT_HW_CACHE_OP_WRITE << 8) | (PERF_COUNT_HW_CACHE_RESULT_ACCESS << 16))},
61 {"node-stores", PERF_TYPE_HW_CACHE, ((PERF_COUNT_HW_CACHE_NODE) | (PERF_COUNT_HW_CACHE_OP_WRITE << 8) | (PERF_COUNT_HW_CACHE_RESULT_ACCESS << 16))},
  /external/bouncycastle/bcprov/src/main/java/org/bouncycastle/x509/
ExtendedPKIXParameters.java 28 private List stores; field in class:ExtendedPKIXParameters
65 stores = new ArrayList();
133 stores = new ArrayList(_params.stores);
207 * @throws ClassCastException if an element of <code>stores</code> is not
210 public void setCertStores(List stores)
212 if (stores != null)
214 Iterator it = stores.iterator();
223 * Sets the Bouncy Castle Stores for finding CRLs, certificates, attribute
228 * @param stores A list of stores to use
    [all...]
  /external/llvm/lib/Target/Hexagon/
HexagonStoreWidening.cpp 9 // Replace sequences of "narrow" stores to adjacent memory locations with
10 // a fewer "wide" stores that have the same effect.
18 // The purpose of this pass is to reduce the number of outstanding stores,
19 // or as one could say, "reduce store queue pressure". Also, wide stores
20 // mean fewer stores, and since there are only two memory instructions allowed
24 #define DEBUG_TYPE "hexagon-widen-stores"
86 bool instrAliased(InstrGroup &Stores, const MachineMemOperand &MMO);
87 bool instrAliased(InstrGroup &Stores, const MachineInstr *MI);
141 INITIALIZE_PASS_BEGIN(HexagonStoreWidening, "hexagon-widen-stores",
144 INITIALIZE_PASS_END(HexagonStoreWidening, "hexagon-widen-stores",
    [all...]
  /external/llvm/test/Transforms/SLPVectorizer/X86/
atomics.ll 7 ; The SLPVectorizer should not vectorize atomic stores and it should not
8 ; schedule regular stores around atomic stores.

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