| /external/mesa3d/src/mesa/drivers/dri/i965/ |
| brw_disasm.c | 674 GLuint swz_x,
699 if (swz_x == BRW_CHANNEL_X &&
706 else if (swz_x == swz_y && swz_x == swz_z && swz_x == swz_w)
709 err |= control (file, "channel select", chan_sel, swz_x, NULL);
714 err |= control (file, "channel select", chan_sel, swz_x, NULL);
726 GLuint swz_x = (inst->bits2.da3src.src0_swizzle >> 0) & 0x3; local
748 if (swz_x == BRW_CHANNEL_X &&
755 else if (swz_x == swz_y && swz_x == swz_z && swz_x == swz_w
774 GLuint swz_x = (inst->bits2.da3src.src1_swizzle >> 0) & 0x3; local
827 GLuint swz_x = (inst->bits3.da3src.src2_swizzle >> 0) & 0x3; local
[all...] |
| /external/mesa3d/src/gallium/drivers/r300/compiler/ |
| radeon_compiler_util.h | 21 rc_swizzle swz_x, rc_swizzle swz_y,
|
| radeon_compiler_util.c | 77 rc_swizzle swz_x, rc_swizzle swz_y, rc_swizzle swz_z, rc_swizzle swz_w)
81 ret |= get_swz(src, swz_x);
|
| /external/llvm/lib/Target/AMDGPU/ |
| R600ISelLowering.cpp | 631 DAG.getConstant(0, DL, MVT::i32), // SWZ_X
[all...] |
| R600Instructions.td | 500 (i32 imm:$swz_x), (i32 imm:$swz_y), (i32 imm:$swz_z), (i32 imm:$swz_w)),
502 imm:$swz_x, imm:$swz_y, imm:$swz_z, imm:$swz_w, cf_inst, 0)
[all...] |
