/external/llvm/test/MC/AArch64/ |
neon-tbl.s | 33 tbx v0.8b, { v1.16b }, v2.8b 34 tbx v0.8b, { v1.16b, v2.16b }, v2.8b 35 tbx v0.8b, { v1.16b, v2.16b, v3.16b }, v2.8b 36 tbx v0.8b, { v1.16b, v2.16b, v3.16b, v4.16b }, v2.8b 37 tbx v0.8b, { v31.16b, v0.16b, v1.16b, v2.16b }, v2.8b 39 // CHECK: tbx v0.8b, { v1.16b }, v2.8b // encoding: [0x20,0x10,0x02,0x0e] 40 // CHECK: tbx v0.8b, { v1.16b, v2.16b }, v2.8b // encoding: [0x20,0x30,0x02,0x0e] 41 // CHECK: tbx v0.8b, { v1.16b, v2.16b, v3.16b }, v2.8b // encoding: [0x20,0x50,0x02,0x0e] 42 // CHECK: tbx v0.8b, { v1.16b, v2.16b, v3.16b, v4.16b }, v2.8b // encoding: [0x20,0x70,0x02,0x0e] 43 // CHECK: tbx v0.8b, { v31.16b, v0.16b, v1.16b, v2.16b }, v2.8b // encoding: [0xe0,0x73,0x02,0x0e [all...] |
arm64-diags.s | 310 tbx v3.16b, { v12.8b, v13.8b, v14.8b }, v6.8b label 311 tbx v2.8b, { v0 }, v6.8b label 319 ; CHECK-ERRORS: tbx v3.16b, { v12.8b, v13.8b, v14.8b }, v6.8b 322 ; CHECK-ERRORS: tbx v2.8b, { v0 }, v6.8b
|
/external/icu/icu4c/source/common/ |
cstring.c | 158 int32_t tbx = sizeof(tbuf); local 171 tbx = sizeof(tbuf)-1; 172 tbuf[tbx] = 0; /* We are generating the digits backwards. Null term the end. */ 175 tbuf[--tbx] = (char)(T_CString_itosOffset(digit)); 180 uprv_strcpy(buffer+length, tbuf+tbx); 181 length += sizeof(tbuf) - tbx -1; 196 int32_t tbx = sizeof(tbuf); local 209 tbx = sizeof(tbuf)-1; 210 tbuf[tbx] = 0; /* We are generating the digits backwards. Null term the end. */ 213 tbuf[--tbx] = (char)(T_CString_itosOffset(digit)) [all...] |
/external/clang/test/CodeGen/ |
aarch64-neon-tbl.c | 94 // CHECK: tbx {{v[0-9]+}}.8b, {{{ ?v[0-9]+.16b ?}}}, {{v[0-9]+}}.8b 110 // CHECK: tbx {{v[0-9]+}}.8b, {{{ ?v[0-9]+.16b, v[0-9]+.16b ?}}}, {{v[0-9]+}}.8b 116 // CHECK: tbx {{v[0-9]+}}.8b, {{{ ?v[0-9]+.16b ?}}}, {{v[0-9]+}}.8b 122 // CHECK: tbx {{v[0-9]+}}.8b, {{{ ?v[0-9]+.16b, v[0-9]+.16b ?}}}, {{v[0-9]+}}.8b 128 // CHECK: tbx {{v[0-9]+}}.8b, {{{ ?v[0-9]+.16b, v[0-9]+.16b, v[0-9]+.16b ?}}}, {{v[0-9]+}}.8b 134 // CHECK: tbx {{v[0-9]+}}.8b, {{{ ?v[0-9]+.16b, v[0-9]+.16b, v[0-9]+.16b, v[0-9]+.16b ?}}}, {{v[0-9]+}}.8b 140 // CHECK: tbx {{v[0-9]+}}.16b, {{{ ?v[0-9]+.16b ?}}}, {{v[0-9]+}}.16b 146 // CHECK: tbx {{v[0-9]+}}.16b, {{{ ?v[0-9]+.16b, v[0-9]+.16b ?}}}, {{v[0-9]+}}.16b 152 // CHECK: tbx {{v[0-9]+}}.16b, {{{ ?v[0-9]+.16b, v[0-9]+.16b, v[0-9]+.16b ?}}}, {{v[0-9]+}}.16b 158 // CHECK: tbx {{v[0-9]+}}.16b, {{{ ?v[0-9]+.16b, v[0-9]+.16b, v[0-9]+.16b, v[0-9]+.16b ?}}}, {{v[0-9]+}}.16 [all...] |
/external/llvm/test/CodeGen/AArch64/ |
arm64-tbl.ll | 70 ; CHECK: tbx.8b 77 ; CHECK: tbx.16b 84 ; CHECK: tbx.8b 91 ; CHECK: tbx.16b 98 ; CHECK: tbx.8b 105 ; CHECK: tbx.16b 112 ; CHECK: tbx.8b 119 ; CHECK: tbx.16b
|
/external/libhevc/common/arm64/ |
ihevc_sao_band_offset_chroma.s | 321 TBX v5.8b, {v1.16b- v2.16b},v7.8b //vtbx4_u8(au1_cur_row_deint.val[0], band_table_u, vsub_u8(au1_cur_row_deint.val[0], band_pos_u)) 324 TBX v6.8b, {v9.16b- v10.16b},v8.8b //vtbx4_u8(au1_cur_row_deint.val[1], band_table_v, vsub_u8(au1_cur_row_deint.val[1], band_pos_v)) 327 TBX v13.8b, {v1.16b- v2.16b},v15.8b //vtbx4_u8(au1_cur_row_deint.val[0], band_table_u, vsub_u8(au1_cur_row_deint.val[0], band_pos_u)) 330 TBX v14.8b, {v9.16b- v10.16b},v16.8b //vtbx4_u8(au1_cur_row_deint.val[1], band_table_v, vsub_u8(au1_cur_row_deint.val[1], band_pos_v)) 337 TBX v17.8b, {v1.16b- v2.16b},v19.8b //vtbx4_u8(au1_cur_row_deint.val[0], band_table_u, vsub_u8(au1_cur_row_deint.val[0], band_pos_u)) 341 TBX v18.8b, {v9.16b- v10.16b},v20.8b //vtbx4_u8(au1_cur_row_deint.val[1], band_table_v, vsub_u8(au1_cur_row_deint.val[1], band_pos_v)) 342 TBX v21.8b, {v1.16b- v2.16b},v23.8b //vtbx4_u8(au1_cur_row_deint.val[0], band_table_u, vsub_u8(au1_cur_row_deint.val[0], band_pos_u)) 343 TBX v22.8b, {v9.16b- v10.16b},v24.8b //vtbx4_u8(au1_cur_row_deint.val[1], band_table_v, vsub_u8(au1_cur_row_deint.val[1], band_pos_v)) 373 TBX v5.8b, {v1.16b- v2.16b},v7.8b //vtbx4_u8(au1_cur_row_deint.val[0], band_table_u, vsub_u8(au1_cur_row_deint.val[0], band_pos_u)) 376 TBX v6.8b, {v9.16b- v10.16b},v8.8b //vtbx4_u8(au1_cur_row_deint.val[1], band_table_v, vsub_u8( (…) [all...] |
ihevc_sao_band_offset_luma.s | 215 TBX v13.8b, {v1.16b- v2.16b},v14.8b //vtbx4_u8(au1_cur_row, band_table, vsub_u8(au1_cur_row, band_pos)) 218 TBX v15.8b, {v1.16b- v2.16b},v16.8b //vtbx4_u8(au1_cur_row, band_table, vsub_u8(au1_cur_row, band_pos)) 221 TBX v17.8b, {v1.16b- v2.16b},v18.8b //vtbx4_u8(au1_cur_row, band_table, vsub_u8(au1_cur_row, band_pos)) 224 TBX v19.8b, {v1.16b- v2.16b},v20.8b //vtbx4_u8(au1_cur_row, band_table, vsub_u8(au1_cur_row, band_pos))
|
/external/opencv3/modules/cudalegacy/src/cuda/ |
bm_fast.cu | 214 int tbx = blockIdx.x * TILE_COLS; 217 int tex = ::min(tbx + TILE_COLS, I0.cols); 234 for (int j = tbx; j < tex; ++j) 238 if (j == tbx)
|
/external/llvm/lib/Target/ARM/ |
ARMFeatures.h | 83 case ARM::tBX:
|
ARMInstrThumb.td | 434 def tBX : TI<(outs), (ins GPR:$Rm, pred:$p), IIC_Br, "bx${p}\t$Rm", []>, 446 [(ARMretflag)], (tBX LR, pred:$p)>, Sched<[WriteBr]>; 451 (tBX GPR:$Rm, pred:$p)>, Sched<[WriteBr]>; 555 (tBX GPR:$dst, (ops 14, zero_reg))>, [all...] |
/external/opencv3/modules/photo/src/cuda/ |
nlm.cu | 432 int tbx = blockIdx.x * TILE_COLS; 435 int tex = ::min(tbx + TILE_COLS, dst.cols); 451 for (int j = tbx; j < tex; ++j) 455 if (j == tbx)
|
/external/vixl/doc/ |
supported-instructions.md | [all...] |
/external/vixl/src/vixl/a64/ |
macro-assembler-a64.h | [all...] |
simulator-a64.h | [all...] |
logic-a64.cc | 2585 LogicVRegister Simulator::tbx(VectorFormat vform, function in class:vixl::Simulator 2600 LogicVRegister Simulator::tbx(VectorFormat vform, function in class:vixl::Simulator 2617 LogicVRegister Simulator::tbx(VectorFormat vform, function in class:vixl::Simulator 2636 LogicVRegister Simulator::tbx(VectorFormat vform, function in class:vixl::Simulator [all...] |
disasm-a64.cc | [all...] |
assembler-a64.h | [all...] |
simulator-a64.cc | [all...] |
/prebuilts/gcc/darwin-x86/aarch64/aarch64-linux-android-4.9/lib/gcc/aarch64-linux-android/4.9/include/ |
arm_neon.h | [all...] |
/prebuilts/gcc/linux-x86/aarch64/aarch64-linux-android-4.9/lib/gcc/aarch64-linux-android/4.9/include/ |
arm_neon.h | [all...] |
/external/llvm/test/MC/Disassembler/AArch64/ |
arm64-advsimd.txt | [all...] |
/external/valgrind/none/tests/arm64/ |
fp_and_simd.c | [all...] |
/toolchain/binutils/binutils-2.25/gas/testsuite/gas/aarch64/ |
illegal.s | 238 tbx v0.8b, {v1.16b, v3.16b, v5.16b, v7.16b}, v2.8b
|
/external/llvm/lib/Target/AArch64/ |
AArch64SchedCyclone.td | 604 // TBL,TBX are WriteV.
|
/prebuilts/ndk/current/sources/cxx-stl/stlport/libs/arm64-v8a/ |
libstlport_static.a | [all...] |