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  /external/llvm/lib/Target/PowerPC/
PPCInstrQPX.td 42 [(set v4f64:$FRT, (IntID v4f64:$FRA, v4f64:$FRB, v4f64:$FRC))]>;
47 [(set v4f64:$FRT, (IntID v4f64:$FRA, v4f64:$FRB, v4f64:$FRC))]>;
52 [(set v4f64:$FRT, (IntID v4f64:$FRA, v4f64:$FRB))]>
    [all...]
  /external/llvm/test/CodeGen/X86/
vector-intrinsics.ll 3 declare <4 x double> @llvm.sin.v4f64(<4 x double> %p)
4 declare <4 x double> @llvm.cos.v4f64(<4 x double> %p)
5 declare <4 x double> @llvm.pow.v4f64(<4 x double> %p, <4 x double> %q)
6 declare <4 x double> @llvm.powi.v4f64(<4 x double> %p, i32)
10 %t = call <4 x double> @llvm.sin.v4f64(<4 x double> %p)
15 %t = call <4 x double> @llvm.cos.v4f64(<4 x double> %p)
20 %t = call <4 x double> @llvm.pow.v4f64(<4 x double> %p, <4 x double> %q)
25 %t = call <4 x double> @llvm.powi.v4f64(<4 x double> %p, i32 %q)
vec_floor.ll 26 %t = call <4 x double> @llvm.floor.v4f64(<4 x double> %p)
29 declare <4 x double> @llvm.floor.v4f64(<4 x double> %p)
62 %t = call <4 x double> @llvm.ceil.v4f64(<4 x double> %p)
65 declare <4 x double> @llvm.ceil.v4f64(<4 x double> %p)
98 %t = call <4 x double> @llvm.trunc.v4f64(<4 x double> %p)
101 declare <4 x double> @llvm.trunc.v4f64(<4 x double> %p)
134 %t = call <4 x double> @llvm.rint.v4f64(<4 x double> %p)
137 declare <4 x double> @llvm.rint.v4f64(<4 x double> %p)
170 %t = call <4 x double> @llvm.nearbyint.v4f64(<4 x double> %p)
173 declare <4 x double> @llvm.nearbyint.v4f64(<4 x double> %p
    [all...]
fma-phi-213-to-231.ll 28 %add = call <4 x double> @llvm.fma.v4f64(<4 x double> %x, <4 x double> %y, <4 x double> %acc.04)
37 declare <4 x double> @llvm.fma.v4f64(<4 x double>, <4 x double>, <4 x double>)
vec_fabs.ll 26 %t = call <4 x double> @llvm.fabs.v4f64(<4 x double> %p)
29 declare <4 x double> @llvm.fabs.v4f64(<4 x double> %p)
  /external/llvm/test/CodeGen/PowerPC/
qpx-rounding-ops.ll 20 %call = tail call <4 x double> @llvm.floor.v4f64(<4 x double> %x) nounwind readnone
30 declare <4 x double> @llvm.floor.v4f64(<4 x double>) nounwind readnone
46 %call = tail call <4 x double> @llvm.nearbyint.v4f64(<4 x double> %x) nounwind readnone
56 declare <4 x double> @llvm.nearbyint.v4f64(<4 x double>) nounwind readnone
72 %call = tail call <4 x double> @llvm.ceil.v4f64(<4 x double> %x) nounwind readnone
82 declare <4 x double> @llvm.ceil.v4f64(<4 x double>) nounwind readnone
98 %call = tail call <4 x double> @llvm.trunc.v4f64(<4 x double> %x) nounwind readnone
108 declare <4 x double> @llvm.trunc.v4f64(<4 x double>) nounwind readnone
vec_rounding.ll 19 declare <4 x double> @llvm.floor.v4f64(<4 x double> %p)
22 %t = call <4 x double> @llvm.floor.v4f64(<4 x double> %p)
41 declare <4 x double> @llvm.ceil.v4f64(<4 x double> %p)
44 %t = call <4 x double> @llvm.ceil.v4f64(<4 x double> %p)
63 declare <4 x double> @llvm.trunc.v4f64(<4 x double> %p)
66 %t = call <4 x double> @llvm.trunc.v4f64(<4 x double> %p)
85 declare <4 x double> @llvm.nearbyint.v4f64(<4 x double> %p)
88 %t = call <4 x double> @llvm.nearbyint.v4f64(<4 x double> %p)
qpx-recipest.ll 6 declare <4 x double> @llvm.sqrt.v4f64(<4 x double>)
11 %x = call <4 x double> @llvm.sqrt.v4f64(<4 x double> %b)
61 %x = call <4 x double> @llvm.sqrt.v4f64(<4 x double> %b)
148 %r = call <4 x double> @llvm.sqrt.v4f64(<4 x double> %a)
vec_fmuladd.ll 10 declare <4 x double> @llvm.fmuladd.v4f64(<4 x double> %val, <4 x double>, <4 x double>)
49 %fmuladd = call <4 x double> @llvm.fmuladd.v4f64 (<4 x double> %x, <4 x double> %x, <4 x double> %x)
  /external/llvm/test/CodeGen/AMDGPU/
fnearbyint.ll 13 declare <4 x double> @llvm.nearbyint.v4f64(<4 x double>) #0
52 %0 = call <4 x double> @llvm.nearbyint.v4f64(<4 x double> %in)
llvm.rint.f64.ll 38 %0 = call <4 x double> @llvm.rint.v4f64(<4 x double> %in)
46 declare <4 x double> @llvm.rint.v4f64(<4 x double>) #0
fcopysign.f64.ll 6 declare <4 x double> @llvm.copysign.v4f64(<4 x double>, <4 x double>) nounwind readnone
37 %result = call <4 x double> @llvm.copysign.v4f64(<4 x double> %mag, <4 x double> %sign)
fma.f64.ll 6 declare <4 x double> @llvm.fma.v4f64(<4 x double>, <4 x double>, <4 x double>) nounwind readnone
44 %r3 = tail call <4 x double> @llvm.fma.v4f64(<4 x double> %r0, <4 x double> %r1, <4 x double> %r2)
fmaxnum.f64.ll 6 declare <4 x double> @llvm.maxnum.v4f64(<4 x double>, <4 x double>) #0
33 %val = call <4 x double> @llvm.maxnum.v4f64(<4 x double> %a, <4 x double> %b) #0
fminnum.f64.ll 6 declare <4 x double> @llvm.minnum.v4f64(<4 x double>, <4 x double>) #0
33 %val = call <4 x double> @llvm.minnum.v4f64(<4 x double> %a, <4 x double> %b) #0
llvm.round.f64.ll 50 %result = call <4 x double> @llvm.round.v4f64(<4 x double> %in) #1
67 declare <4 x double> @llvm.round.v4f64(<4 x double>) #1
fabs.f64.ll 8 declare <4 x double> @llvm.fabs.v4f64(<4 x double>) readnone
50 %fabs = call <4 x double> @llvm.fabs.v4f64(<4 x double> %in)
fceil64.ll 8 declare <4 x double> @llvm.ceil.v4f64(<4 x double>) nounwind readnone
64 %y = call <4 x double> @llvm.ceil.v4f64(<4 x double> %x) nounwind readnone
ffloor.f64.ll 9 declare <4 x double> @llvm.floor.v4f64(<4 x double>) nounwind readnone
86 %y = call <4 x double> @llvm.floor.v4f64(<4 x double> %x) nounwind readnone
fneg-fabs.f64.ll 91 %fabs = call <4 x double> @llvm.fabs.v4f64(<4 x double> %in)
100 declare <4 x double> @llvm.fabs.v4f64(<4 x double>) readnone
ftrunc.f64.ll 8 declare <4 x double> @llvm.trunc.v4f64(<4 x double>) nounwind readnone
70 %y = call <4 x double> @llvm.trunc.v4f64(<4 x double> %x) nounwind readnone
  /external/llvm/test/CodeGen/Hexagon/vect/
vect-fma.ll 3 ; Used to fail with "SplitVectorResult #0: 0x16cbe60: v4f64 = fma"
  /external/llvm/lib/Target/X86/
X86InstrFMA.td 107 loadv4f64, X86Fmadd, v2f64, v4f64>, VEX_W;
109 loadv4f64, X86Fmsub, v2f64, v4f64>, VEX_W;
112 v2f64, v4f64>, VEX_W;
115 v2f64, v4f64>, VEX_W;
127 loadv4f64, X86Fnmadd, v2f64, v4f64>, VEX_W;
130 v4f64>, VEX_W;
428 defm VFMADDPD4 : fma4p<0x69, "vfmaddpd", X86Fmadd, v2f64, v4f64,
430 defm VFMSUBPD4 : fma4p<0x6D, "vfmsubpd", X86Fmsub, v2f64, v4f64,
432 defm VFNMADDPD4 : fma4p<0x79, "vfnmaddpd", X86Fnmadd, v2f64, v4f64,
434 defm VFNMSUBPD4 : fma4p<0x7D, "vfnmsubpd", X86Fnmsub, v2f64, v4f64,
    [all...]
  /external/llvm/test/CodeGen/AArch64/
vector-fcopysign.ll 147 ;============ v4f64
160 %r = call <4 x double> @llvm.copysign.v4f64(<4 x double> %a, <4 x double> %tmp0)
172 %r = call <4 x double> @llvm.copysign.v4f64(<4 x double> %a, <4 x double> %b)
176 declare <4 x double> @llvm.copysign.v4f64(<4 x double> %a, <4 x double> %b) #0
arm64-fmuladd.ll 78 %tmp4 = call <4 x double> @llvm.fmuladd.v4f64(<4 x double> %tmp1, <4 x double> %tmp2, <4 x double> %tmp3)
88 declare <4 x double> @llvm.fmuladd.v4f64(<4 x double>, <4 x double>, <4 x double>) nounwind readnone

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