/toolchain/binutils/binutils-2.25/gas/testsuite/gas/arm/ |
vldm-thumb-bad.d | 1 # name: VFP VLDM and VSTM, Thumb mode 3 # source: vldm.s 4 # error-output: vldm-thumb-bad.l
|
neon-ldst-rm.s | 15 multi vldm 16 multi vldm ia 17 multi vldm ia "!" 18 multi vldm db "!"
|
vldmw-arm-bad.d | 1 # name: VFP VLDM and VSTM with writeback, ARM mode
|
vldmw-thumb-bad.d | 1 # name: VFP VLDM and VSTM with writeback, Thumb mode
|
vldm-arm.d | 1 # name: VFP VLDM and VSTM, ARM mode 3 # source: vldm.s
|
vfp-neon-syntax-inc.s | 149 multi vldm 150 multi vldm eq
|
/external/llvm/test/CodeGen/ARM/ |
2012-09-25-InlineAsmScalarToVectorConv.ll | 7 %1 = call { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } asm "vldm $4, { ${0:q}, ${1:q}, ${2:q}, ${3:q} }", "=r,=r,=r,=r,r"(i64* undef) nounwind, !srcloc !0
|
swift-vldm.ll | 3 ; Check that we avoid producing vldm instructions using d registers that
|
/external/clang/test/CodeGen/ |
arm-asm-warn.c | 25 __asm__("vldm %[a], { %q[r0], %q[r1], %q[r2], %q[r3] }"
|
arm-asm-diag.c | 11 __asm__("vldm %[a], { %q[r0], %q[r1], %q[r2], %q[r3] }"
|
/external/v8/test/cctest/ |
test-assembler-ppc.cc | 669 // Create a function that uses vldm/vstm to move some double and 681 __ vldm(ia_w, r4, d0, d3); 682 __ vldm(ia_w, r4, d4, d7); 689 __ vldm(ia_w, r4, s0, s3); 690 __ vldm(ia_w, r4, s4, s7); 781 // Create a function that uses vldm/vstm to move some double and 793 __ vldm(ia, r4, d0, d3); 795 __ vldm(ia, r4, d4, d7); 803 __ vldm(ia, r4, s0, s3); 805 __ vldm(ia, r4, s4, s7) [all...] |
test-assembler-arm.cc | 653 // Create a function that uses vldm/vstm to move some double and 662 __ vldm(ia_w, r4, d0, d3); 663 __ vldm(ia_w, r4, d4, d7); 670 __ vldm(ia_w, r4, s0, s3); 671 __ vldm(ia_w, r4, s4, s7); 759 // Create a function that uses vldm/vstm to move some double and 768 __ vldm(ia, r4, d0, d3); 770 __ vldm(ia, r4, d4, d7); 778 __ vldm(ia, r4, s0, s3); 780 __ vldm(ia, r4, s4, s7) [all...] |
test-disasm-arm.cc | 682 COMPARE(vldm(ia, r1, d2, d5), 686 COMPARE(vldm(ia, r3, d0, d15), 690 COMPARE(vldm(ia, r5, s2, s5), 694 COMPARE(vldm(ia, r7, s0, s31), 801 COMPARE(vldm(ia, r3, d16, d31), 805 COMPARE(vldm(ia, r3, d23, d27), [all...] |
/external/llvm/lib/Target/ARM/ |
ARMScheduleA9.td | [all...] |
ARMSelectionDAGInfo.cpp | 169 // VLDM/VSTM and make this code emit it when appropriate. This would reduce
|
ARMScheduleSwift.td | [all...] |
ARMLoadStoreOptimizer.cpp | 53 STATISTIC(NumVLDMGened, "Number of vldm instructions generated"); 614 // VLDM/VSTM do not support DB mode without also updating the base reg. [all...] |
ARMBaseInstrInfo.h | 302 /// Get the number of addresses by LDM or VLDM or zero for unknown.
|
ARMBaseRegisterInfo.cpp | 799 // (2) generates better code in some test cases (like vldm-shed-a9.ll)
|
/external/llvm/test/MC/ARM/ |
single-precision-fp.s | 177 vldm r0, {d0, d1}
|
/external/v8/src/arm/ |
assembler-arm.h | [all...] |
disasm-arm.cc | [all...] |
/external/boringssl/src/crypto/chacha/ |
chacha_vec_arm.S | 1321 vldm sp!, {d8-d15} 1371 vldm sp!, {d8-d15}
|
/art/runtime/arch/arm/ |
quick_entrypoints_arm.S | 434 vldm ip, {s0-s15} @ copy s0 - s15 515 vldm r1, {s0-s31} @ load all fprs from argument fprs_ [all...] |
/external/llvm/lib/Target/ARM/MCTargetDesc/ |
ARMMCCodeEmitter.cpp | [all...] |