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  /toolchain/binutils/binutils-2.25/gas/testsuite/gas/arm/
vfp1xD.s 352 @ ARM VMSR/VMRS instructions
353 vmrs r0, FPSCR
354 vmrs r1, FPSCR
355 vmrs r2, FPSCR
356 vmrs r3, FPSCR
357 vmrs r4, FPSCR
358 vmrs r5, FPSCR
359 vmrs r6, FPSCR
360 vmrs r7, FPSCR
361 vmrs r8, FPSC
    [all...]
vfp1xD.d 10 0+000 <[^>]*> eef1fa10 (vmrs APSR_nzcv, fpscr|fmstat)
61 0+0cc <[^>]*> eef00a10 (vmrs|fmrx) r0, fpsid
62 0+0d0 <[^>]*> eef10a10 (vmrs|fmrx) r0, fpscr
63 0+0d4 <[^>]*> eef80a10 (vmrs|fmrx) r0, fpexc
123 0+1c4 <[^>]*> eef01a10 (vmrs|fmrx) r1, fpsid
124 0+1c8 <[^>]*> eef0ea10 (vmrs|fmrx) lr, fpsid
242 0+3a0 <[^>]*> eef90a10 (vmrs|fmrx) r0, fpinst @ Impl def
243 0+3a4 <[^>]*> eefa0a10 (vmrs|fmrx) r0, fpinst2 @ Impl def
244 0+3a8 <[^>]*> eef70a10 (vmrs|fmrx) r0, mvfr0
245 0+3ac <[^>]*> eef60a10 (vmrs|fmrx) r0, mvfr
    [all...]
  /external/llvm/test/CodeGen/ARM/
fpcmp_ueq.ll 8 ; CHECK: vmrs APSR_nzcv, fpscr
10 ; CHECK-NOT: vmrs
fpcmp-opt.ll 14 ; CHECK: vmrs APSR_nzcv, fpscr
42 ; CHECK-NOT: vmrs
65 ; CHECK-NOT: vmrs
ifcvt11.ll 3 ; Adjust if-converter heuristics to avoid predicating vmrs which can cause
21 ; CHECK: vmrs APSR_nzcv, fpscr
36 ; CHECK: vmrs APSR_nzcv, fpscr
  /external/llvm/test/MC/ARM/
simple-fp-encoding.s 120 vmrs APSR_nzcv, fpscr
121 vmrs apsr_nzcv, fpscr
123 vmrs r2, fpsid
124 vmrs r3, FPSID
125 vmrs r4, mvfr0
126 vmrs r5, MVFR1
128 @ CHECK: vmrs APSR_nzcv, fpscr @ encoding: [0x10,0xfa,0xf1,0xee]
129 @ CHECK: vmrs APSR_nzcv, fpscr @ encoding: [0x10,0xfa,0xf1,0xee]
130 @ CHECK: vmrs APSR_nzcv, fpscr @ encoding: [0x10,0xfa,0xf1,0xee]
131 @ CHECK: vmrs r2, fpsid @ encoding: [0x10,0x2a,0xf0,0xee
    [all...]
  /external/compiler-rt/lib/builtins/arm/
eqdf2vfp.S 25 vmrs apsr_nzcv, fpscr
eqsf2vfp.S 25 vmrs apsr_nzcv, fpscr
gedf2vfp.S 25 vmrs apsr_nzcv, fpscr
gesf2vfp.S 25 vmrs apsr_nzcv, fpscr
gtdf2vfp.S 25 vmrs apsr_nzcv, fpscr
gtsf2vfp.S 25 vmrs apsr_nzcv, fpscr
ledf2vfp.S 25 vmrs apsr_nzcv, fpscr
lesf2vfp.S 25 vmrs apsr_nzcv, fpscr
ltdf2vfp.S 25 vmrs apsr_nzcv, fpscr
ltsf2vfp.S 25 vmrs apsr_nzcv, fpscr
nedf2vfp.S 25 vmrs apsr_nzcv, fpscr
nesf2vfp.S 25 vmrs apsr_nzcv, fpscr
unorddf2vfp.S 25 vmrs apsr_nzcv, fpscr
unordsf2vfp.S 25 vmrs apsr_nzcv, fpscr
  /external/llvm/test/MC/Disassembler/ARM/
invalid-because-armv7.txt 22 # Would be vmrs r0, mvfr2
  /development/ndk/platforms/android-3/arch-arm/include/
fenv.h 71 __asm__ __volatile__("vmrs %0,fpscr" : "=r" (_fpscr));
73 /* Switching from thumb1 to arm, do vmrs, then switch back */
79 "vmrs %0, fpscr \n\t"
  /prebuilts/ndk/current/platforms/android-12/arch-arm/usr/include/
fenv.h 71 __asm__ __volatile__("vmrs %0,fpscr" : "=r" (_fpscr));
73 /* Switching from thumb1 to arm, do vmrs, then switch back */
79 "vmrs %0, fpscr \n\t"
  /prebuilts/ndk/current/platforms/android-13/arch-arm/usr/include/
fenv.h 71 __asm__ __volatile__("vmrs %0,fpscr" : "=r" (_fpscr));
73 /* Switching from thumb1 to arm, do vmrs, then switch back */
79 "vmrs %0, fpscr \n\t"
  /prebuilts/ndk/current/platforms/android-14/arch-arm/usr/include/
fenv.h 71 __asm__ __volatile__("vmrs %0,fpscr" : "=r" (_fpscr));
73 /* Switching from thumb1 to arm, do vmrs, then switch back */
79 "vmrs %0, fpscr \n\t"

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