| /external/valgrind/none/tests/ppc32/ |
| jm-insns.c | 6262 volatile vector unsigned int vec_in, vec_out, vscr; local
6321 volatile vector unsigned int vec_in1, vec_in2, vec_out, vscr; local
6387 volatile vector unsigned int vec_in1, vec_in2, vec_in3, vec_out, vscr; local
6462 volatile vector unsigned int vec_in1, vec_out, vscr; local
6532 volatile vector unsigned int vec_in1, vec_out, vscr; local
6602 volatile vector unsigned int vec_out, vscr; local
6660 volatile vector unsigned int vec_in1, vec_in2, vec_out, vscr; local
6735 volatile vector unsigned int vec_out, vscr; local
6854 volatile vector unsigned int vec_in, vec_out, vscr; local
6938 volatile vector unsigned int vec_in, vec_out, vscr; local
7019 volatile vector unsigned int vscr; local
7087 volatile vector unsigned int vscr; local
7154 volatile vector unsigned int vscr; local
7260 volatile vector unsigned int vec_in, vec_out, vscr; local
[all...] |
| /external/elfutils/backends/ |
| ppc_corenote.c | 81 /* vscr XXX 67 is an unofficial assignment */
|
| ppc_regs.c | 107 return stpcpy (name, "vscr") + 1 - name;
|
| ChangeLog | 664 * ppc_regs.c (ppc_register_info): Assign 67 to "vscr".
665 Return "vector" and 32 bits for vscr and vrsave.
|
| /external/libunwind/src/ppc64/ |
| regname.c | 146 [UNW_PPC64_VSCR]="VSCR",
|
| ucontext_i.h | 170 #define UC_MCONTEXT_VREGS_VSCR ((void *)&dmy_vrregset.vscr - (void *)&dmy_vrregset)
|
| /external/valgrind/coregrind/m_gdbserver/ |
| power-altivec.xml | 55 <reg name="vscr" bitsize="32" group="vector"/>
|
| valgrind-low-ppc32.c | 147 { "vscr", 7456, 32 },
|
| valgrind-low-ppc64.c | 144 { "vscr", 8672, 32 },
|
| /external/google-breakpad/src/google_breakpad/common/ |
| minidump_cpu_ppc.h | 95 /* Vector registers (including vscr) are 128 bits, but mach/ppc/_types.h
|
| /external/valgrind/coregrind/m_dispatch/ |
| dispatch-ppc32-linux.S | 254 VSCR or FPSCR in ways we don't expect. */
280 /* Check VSCR[NJ] == 1 */
285 /* retrieve VSCR and mask wanted bits */
|
| dispatch-ppc64be-linux.S | 259 VSCR or FPSCR in ways we don't expect. */
276 /* Check VSCR[NJ] == 1 */
281 /* retrieve VSCR and mask wanted bits */
|
| dispatch-ppc64le-linux.S | 285 VSCR or FPSCR in ways we don't expect. */
302 /* Check VSCR[NJ] == 1 */
307 /* retrieve VSCR and mask wanted bits */
|
| /external/valgrind/include/vki/ |
| vki-ppc64-linux.h | 274 #define VKI_ELF_NVRREG 34 /* includes vscr & vrsave in split vectors */
287 * The entry with index 32 contains the vscr as the last word (offset 12)
288 * within the quadword. This allows the vscr to be stored as either a
299 * vrsave along with vscr and so only uses 33 vectors for the register set
330 * index 32 contains the vscr as the last word (offset 12) within the
331 * quadword. This allows the vscr to be stored as either a quadword (since
|
| /prebuilts/go/darwin-x86/src/html/ |
| entity.go | 564 "Vscr;": '\U0001D4B1',
[all...] |
| /prebuilts/go/linux-x86/src/html/ |
| entity.go | 564 "Vscr;": '\U0001D4B1',
[all...] |
| /external/libunwind/src/ptrace/ |
| _UPT_reg_offset.c | 442 [UNW_PPC64_VSCR] = UNW_PPC_PT(VSCR), \
|
| /external/elfutils/tests/ |
| run-allregs.sh | [all...] |
| run-addrcfi.sh | 369 vector reg67 (vscr): undefined
[all...] |
| /external/llvm/include/llvm/IR/ |
| IntrinsicsPowerPC.td | 182 // VSCR access.
[all...] |
| /prebuilts/go/darwin-x86/pkg/darwin_amd64/ |
| html.a | [all...] |
| /prebuilts/go/darwin-x86/pkg/darwin_amd64_race/ |
| html.a | [all...] |
| /prebuilts/go/linux-x86/pkg/linux_amd64/ |
| html.a | [all...] |
| /prebuilts/go/linux-x86/pkg/linux_amd64_race/ |
| html.a | [all...] |
| /external/chromium-trace/catapult/third_party/html5lib-python/html5lib/ |
| constants.py | [all...] |
