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  /external/llvm/lib/Target/ARM/
ARMLoadStoreOptimizer.cpp 271 case ARM::VSTRS:
408 case ARM::VSTRS:
897 assert(isi32Store(Opcode) || Opcode == ARM::VSTRS || Opcode == ARM::VSTRD);
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ARMInstrVFP.td 107 def VSTRS : ASI5<0b1101, 0b00, (outs), (ins SPR:$Sd, addrmode5:$addr),
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ARMBaseRegisterInfo.cpp 497 case ARM::VSTRS: case ARM::VSTRD:
ARMScheduleSwift.td 665 def : InstRW<[SwiftWriteLM4Cy], (instregex "VSTRD$", "VSTRS$")>;
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ARMBaseInstrInfo.cpp 867 AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::VSTRS))
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ARMFastISel.cpp     [all...]
  /art/compiler/utils/arm/
assembler_arm32.h 167 void vstrs(SRegister sd, const Address& ad, Condition cond = AL) OVERRIDE;
assembler_arm32.cc 1048 void Arm32Assembler::vstrs(SRegister sd, const Address& ad, Condition cond) { function in class:art::arm::Arm32Assembler
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assembler_thumb2.h 212 void vstrs(SRegister sd, const Address& ad, Condition cond = AL) OVERRIDE;
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assembler_arm.h 633 virtual void vstrs(SRegister sd, const Address& ad, Condition cond = AL) = 0;
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assembler_thumb2.cc 2957 void Thumb2Assembler::vstrs(SRegister sd, const Address& ad, Condition cond) { function in class:art::arm::Thumb2Assembler
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