Lines Matching defs:source
2 * Copyright (C) 2016 The Android Open Source Project
2335 void CodeGeneratorARMVIXL::Move32(Location destination, Location source) {
2336 if (source.Equals(destination)) {
2340 if (source.IsRegister()) {
2341 __ Mov(RegisterFrom(destination), RegisterFrom(source));
2342 } else if (source.IsFpuRegister()) {
2343 __ Vmov(RegisterFrom(destination), SRegisterFrom(source));
2348 source.GetStackIndex());
2351 if (source.IsRegister()) {
2352 __ Vmov(SRegisterFrom(destination), RegisterFrom(source));
2353 } else if (source.IsFpuRegister()) {
2354 __ Vmov(SRegisterFrom(destination), SRegisterFrom(source));
2356 GetAssembler()->LoadSFromOffset(SRegisterFrom(destination), sp, source.GetStackIndex());
2360 if (source.IsRegister()) {
2362 RegisterFrom(source),
2365 } else if (source.IsFpuRegister()) {
2366 GetAssembler()->StoreSToOffset(SRegisterFrom(source), sp, destination.GetStackIndex());
2368 DCHECK(source.IsStackSlot()) << source;
2371 GetAssembler()->LoadFromOffset(kLoadWord, temp, sp, source.GetStackIndex());
6169 vixl32::Register source = value;
6177 source = temp1;
6183 GetAssembler()->StoreToOffset(kStoreWord, source, array, offset);
6191 LocationFrom(source),
6458 Location source = move->GetSource();
6461 if (source.IsRegister()) {
6463 __ Mov(RegisterFrom(destination), RegisterFrom(source));
6465 __ Vmov(SRegisterFrom(destination), RegisterFrom(source));
6469 RegisterFrom(source),
6473 } else if (source.IsStackSlot()) {
6478 source.GetStackIndex());
6480 GetAssembler()->LoadSFromOffset(SRegisterFrom(destination), sp, source.GetStackIndex());
6484 GetAssembler()->LoadFromOffset(kLoadWord, temp, sp, source.GetStackIndex());
6487 } else if (source.IsFpuRegister()) {
6489 __ Vmov(RegisterFrom(destination), SRegisterFrom(source));
6491 __ Vmov(SRegisterFrom(destination), SRegisterFrom(source));
6494 GetAssembler()->StoreSToOffset(SRegisterFrom(source), sp, destination.GetStackIndex());
6496 } else if (source.IsDoubleStackSlot()) {
6499 GetAssembler()->LoadDFromOffset(temp, sp, source.GetStackIndex());
6504 kLoadWordPair, LowRegisterFrom(destination), sp, source.GetStackIndex());
6507 GetAssembler()->LoadDFromOffset(DRegisterFrom(destination), sp, source.GetStackIndex());
6509 } else if (source.IsRegisterPair()) {
6511 __ Mov(LowRegisterFrom(destination), LowRegisterFrom(source));
6512 __ Mov(HighRegisterFrom(destination), HighRegisterFrom(source));
6514 __ Vmov(DRegisterFrom(destination), LowRegisterFrom(source), HighRegisterFrom(source));
6517 DCHECK(ExpectedPairLayout(source));
6519 LowRegisterFrom(source),
6523 } else if (source.IsFpuRegisterPair()) {
6525 __ Vmov(LowRegisterFrom(destination), HighRegisterFrom(destination), DRegisterFrom(source));
6527 __ Vmov(DRegisterFrom(destination), DRegisterFrom(source));
6530 GetAssembler()->StoreDToOffset(DRegisterFrom(source), sp, destination.GetStackIndex());
6533 DCHECK(source.IsConstant()) << source;
6534 HConstant* constant = source.GetConstant();
6546 int64_t value = Int64ConstantFrom(source);
6617 Location source = move->GetSource();
6621 if (source.IsRegister() && destination.IsRegister()) {
6623 DCHECK(!RegisterFrom(source).Is(temp));
6626 __ Mov(RegisterFrom(destination), RegisterFrom(source));
6627 __ Mov(RegisterFrom(source), temp);
6628 } else if (source.IsRegister() && destination.IsStackSlot()) {
6629 Exchange(RegisterFrom(source), destination.GetStackIndex());
6630 } else if (source.IsStackSlot() && destination.IsRegister()) {
6631 Exchange(RegisterFrom(destination), source.GetStackIndex());
6632 } else if (source.IsStackSlot() && destination.IsStackSlot()) {
6633 Exchange(source.GetStackIndex(), destination.GetStackIndex());
6634 } else if (source.IsFpuRegister() && destination.IsFpuRegister()) {
6636 __ Vmov(temp, SRegisterFrom(source));
6637 __ Vmov(SRegisterFrom(source), SRegisterFrom(destination));
6639 } else if (source.IsRegisterPair() && destination.IsRegisterPair()) {
6641 __ Vmov(temp, LowRegisterFrom(source), HighRegisterFrom(source));
6642 __ Mov(LowRegisterFrom(source), LowRegisterFrom(destination));
6643 __ Mov(HighRegisterFrom(source), HighRegisterFrom(destination));
6645 } else if (source.IsRegisterPair() || destination.IsRegisterPair()) {
6646 vixl32::Register low_reg = LowRegisterFrom(source.IsRegisterPair() ? source : destination);
6647 int mem = source.IsRegisterPair() ? destination.GetStackIndex() : source.GetStackIndex();
6648 DCHECK(ExpectedPairLayout(source.IsRegisterPair() ? source : destination));
6653 } else if (source.IsFpuRegisterPair() && destination.IsFpuRegisterPair()) {
6654 vixl32::DRegister first = DRegisterFrom(source);
6660 } else if (source.IsFpuRegisterPair() || destination.IsFpuRegisterPair()) {
6661 vixl32::DRegister reg = source.IsFpuRegisterPair()
6662 ? DRegisterFrom(source)
6664 int mem = source.IsFpuRegisterPair()
6666 : source.GetStackIndex();
6671 } else if (source.IsFpuRegister() || destination.IsFpuRegister()) {
6672 vixl32::SRegister reg = source.IsFpuRegister()
6673 ? SRegisterFrom(source)
6675 int mem = source.IsFpuRegister()
6677 : source.GetStackIndex();
6682 } else if (source.IsDoubleStackSlot() && destination.IsDoubleStackSlot()) {
6685 __ Vldr(temp1, MemOperand(sp, source.GetStackIndex()));
6688 __ Vstr(temp2, MemOperand(sp, source.GetStackIndex()));
6690 LOG(FATAL) << "Unimplemented" << source << " <-> " << destination;
