Lines Matching full:binit
713 When 0, bus protocol errors (BINIT#) are signaled by the
714 processor on the bus. When 1, bus protocol errors (BINIT#) are
724 When 0, bus protocol errors (BINIT#) are detected and sampled
727 (BINIT#).
766 When 0, the processor asserts BINIT# if it detects a parity
1364 UINT64 DisableBinitWithTimeout:1; ///< Bit56, Disable a BINIT on
1367 ///< generate a BINIT on an
1370 ///< generate a BINIT on an
1408 ///< they are promoted to BINIT if bit
1409 ///< 38, Enable MCA to BINIT promotion,
1415 UINT64 EnableMcaToBinitPromotion:1; ///< Bit61, Enable MCA to BINIT
1420 ///< the BINIT pin is assert on
1423 ///< effect if BINIT signalling
1439 ///< (BINIT) signal, and the BINIT pin
1442 ///< has no effect if BINIT signalling
