Lines Matching refs:Operation
42 memory read operation is performed at the PCI memory address specified by
44 operation is stored in Result. This PCI memory read operation is repeated
98 read operation is performed at the PCI I/O address specified by Address for
99 the width specified by Width. The result of this PCI I/O read operation is
100 stored in Result. This PCI I/O read operation is repeated until either a
160 @param[in] Width Signifies the width of the memory operation.
162 @param[in] Address The base address of the memory operation. The caller
204 @param[in] Width Signifies the width of the memory operation.
206 @param[in] Address The base address of the memory operation. The caller
244 @param[in] UserAddress The base address of the I/O operation. The caller is
283 @param[in] UserAddress The base address of the I/O operation. The caller is
320 is especially useful for video scroll operation on a memory mapped video
331 @param[in] DestAddress The destination address of the memory operation. The
335 @param[in] SrcAddress The source address of the memory operation. The caller
465 @param[in] Operation Indicates if the bus master is going to read
479 master DMA operation is complete.
484 @retval EFI_INVALID_PARAMETER Operation is invalid.
507 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_OPERATION Operation,
515 Completes the Map() operation and releases any corresponding resources.
517 The Unmap() function completes the Map() operation and releases any
519 If the operation was an EfiPciOperationBusMasterWrite or
925 @param[in] OperationType I/O operation type: IO/MMIO/PCI.
927 @param[in] Width Signifies the width of the I/O or Memory operation.
929 @param[in] Address The base address of the I/O operation.
1445 memory read operation is performed at the PCI memory address specified by
1447 operation is stored in Result. This PCI memory read operation is repeated
1565 read operation is performed at the PCI I/O address specified by Address for
1567 The result of this PCI I/O read operation is stored in Result. This PCI I/O
1568 read operation is repeated until either a timeout of Delay 100 ns units has
1688 @param[in] Width Signifies the width of the memory operation.
1690 @param[in] Address The base address of the memory operation. The caller
1735 @param[in] Width Signifies the width of the memory operation.
1737 @param[in] Address The base address of the memory operation. The caller
1778 @param[in] Address The base address of the I/O operation. The caller is
1820 @param[in] Address The base address of the I/O operation. The caller is
1859 is especially useful for video scroll operation on a memory mapped video
1870 @param[in] DestAddress The destination address of the memory operation. The
1874 @param[in] SrcAddress The source address of the memory operation. The caller
2063 @param[in] Operation Indicates if the bus master is going to read
2077 master DMA operation is complete.
2082 @retval EFI_INVALID_PARAMETER Operation is invalid.
2105 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_OPERATION Operation,
2127 // Make sure that Operation is valid
2129 if ((UINT32)Operation >= EfiPciOperationMaximum) {
2146 if (Operation == EfiPciOperationBusMasterCommonBuffer ||
2147 Operation == EfiPciOperationBusMasterCommonBuffer64) {
2173 MapInfo->Operation = Operation;
2195 // If this is a read operation from the Bus Master's point of view,
2199 if (Operation == EfiPciOperationBusMasterRead ||
2200 Operation == EfiPciOperationBusMasterRead64) {
2224 Completes the Map() operation and releases any corresponding resources.
2226 The Unmap() function completes the Map() operation and releases any
2228 If the operation
2255 // See if the Map() operation associated with this Unmap() required a mapping
2266 // If this is a write operation from the Bus Master's point of view,
2270 if (MapInfo->Operation == EfiPciOperationBusMasterWrite ||
2271 MapInfo->Operation == EfiPciOperationBusMasterWrite64) {
