Home | History | Annotate | Download | only in SparseLU

Lines Matching refs:RK

36     RK = NumberOfRegisters>=16 ? 4 : 2, // register blocking
40 Index d_end = (d/RK)*RK; // number of columns of A (rows of B) suitable for full register blocking
70 for(Index k=0; k<d_end; k+=RK)
73 // load and expand a RN x RK block of B
77 if(RK==4) { b20 = pset1<Packet>(Bc0[2]); }
78 if(RK==4) { b30 = pset1<Packet>(Bc0[3]); }
81 if(RK==4) { b21 = pset1<Packet>(Bc1[2]); }
82 if(RK==4) { b31 = pset1<Packet>(Bc1[3]); }
96 if(RK==4)
117 if(RK==4){ KMADD(c0, a2, b20, t0) }\
118 if(RK==4){ KMADD(c1, a2, b21, t1) }\
119 if(RK==4){ a2 = pload<Packet>(A2+i+(I+1)*PacketSize); }\
120 if(RK==4){ KMADD(c0, a3, b30, t0) }\
121 if(RK==4){ KMADD(c1, a3, b31, t1) }\
122 if(RK==4){ a3 = pload<Packet>(A3+i+(I+1)*PacketSize); }\
132 if(RK==4) prefetch((A2+i+(5)*PacketSize));
133 if(RK==4) prefetch((A3+i+(5)*PacketSize));
153 if(RK==4)
165 Bc0 += RK;
166 Bc1 += RK;
174 for(Index k=0; k<d_end; k+=RK)
177 // load and expand a 1 x RK block of B
181 if(RK==4) b20 = pset1<Packet>(Bc0[2]);
182 if(RK==4) b30 = pset1<Packet>(Bc0[3]);
195 if(RK==4)
212 if(RK==4){ KMADD(c0, a2, b20, t0) }\
213 if(RK==4){ a2 = pload<Packet>(A2+i+(I+1)*PacketSize); }\
214 if(RK==4){ KMADD(c0, a3, b30, t0) }\
215 if(RK==4){ a3 = pload<Packet>(A3+i+(I+1)*PacketSize); }\
239 if(RK==4)
245 Bc0 += RK;