Lines Matching refs:Op
121 void printTargetFlags(const MachineOperand &Op);
122 void print(const MachineOperand &Op, const TargetRegisterInfo *TRI,
125 void print(const MachineMemOperand &Op);
593 for (const auto *Op : MI.memoperands()) {
596 print(*Op);
690 void MIPrinter::printTargetFlags(const MachineOperand &Op) {
691 if (!Op.getTargetFlags())
694 Op.getParent()->getParent()->getParent()->getSubtarget().getInstrInfo();
696 auto Flags = TII->decomposeMachineOperandsTargetFlags(Op.getTargetFlags());
750 void MIPrinter::print(const MachineOperand &Op, const TargetRegisterInfo *TRI,
753 printTargetFlags(Op);
754 switch (Op.getType()) {
756 if (Op.isImplicit())
757 OS << (Op.isDef() ? "implicit-def " : "implicit ");
758 else if (!IsDef && Op.isDef())
761 if (Op.isInternalRead())
763 if (Op.isDead())
765 if (Op.isKill())
767 if (Op.isUndef())
769 if (Op.isEarlyClobber())
771 if (Op.isDebug())
773 printReg(Op.getReg(), OS, TRI);
775 if (Op.getSubReg() != 0)
776 OS << ':' << TRI->getSubRegIndexName(Op.getSubReg());
777 if (ShouldPrintRegisterTies && Op.isTied() && !Op.isDef())
778 OS << "(tied-def " << Op.getParent()->findTiedOperandIdx(I) << ")";
780 if (IsDef && MRI->getSize(Op.getReg()))
781 OS << '(' << MRI->getSize(Op.getReg()) << ')';
784 OS << Op.getImm();
787 Op.getCImm()->printAsOperand(OS, /*PrintType=*/true, MST);
790 Op.getFPImm()->printAsOperand(OS, /*PrintType=*/true, MST);
793 printMBBReference(*Op.getMBB());
796 printStackObjectReference(Op.getIndex());
799 OS << "%const." << Op.getIndex();
800 printOffset(Op.getOffset());
805 *Op.getParent()->getParent()->getParent(), Op.getIndex()))
810 printOffset(Op.getOffset());
814 OS << "%jump-table." << Op.getIndex();
818 printLLVMNameWithoutPrefix(OS, Op.getSymbolName());
819 printOffset(Op.getOffset());
822 Op.getGlobal()->printAsOperand(OS, /*PrintType=*/false, MST);
823 printOffset(Op.getOffset());
827 Op.getBlockAddress()->getFunction()->printAsOperand(OS, /*PrintType=*/false,
830 printIRBlockReference(*Op.getBlockAddress()->getBasicBlock());
832 printOffset(Op.getOffset());
835 auto RegMaskInfo = RegisterMaskIds.find(Op.getRegMask());
843 const uint32_t *RegMask = Op.getRegLiveOut();
858 Op.getMetadata()->printAsOperand(OS, MST);
861 OS << "<mcsymbol " << *Op.getMCSymbol() << ">";
864 const auto &MMI = Op.getParent()->getParent()->getParent()->getMMI();
865 print(MMI.getFrameInstructions()[Op.getCFIIndex()], TRI);
871 void MIPrinter::print(const MachineMemOperand &Op) {
874 if (Op.isVolatile())
876 if (Op.isNonTemporal())
878 if (Op.isInvariant())
880 if (Op.isLoad())
883 assert(Op.isStore() && "Non load machine operand must be a store");
886 OS << Op.getSize();
887 if (const Value *Val = Op.getValue()) {
888 OS << (Op.isLoad() ? " from " : " into ");
890 } else if (const PseudoSourceValue *PVal = Op.getPseudoValue()) {
891 OS << (Op.isLoad() ? " from " : " into ");
922 printOffset(Op.getOffset());
923 if (Op.getBaseAlignment() != Op.getSize())
924 OS << ", align " << Op.getBaseAlignment();
925 auto AAInfo = Op.getAAInfo();
938 if (Op.getRanges()) {
940 Op.getRanges()->printAsOperand(OS, MST);
