Cross Reference: /external/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp

Lines Matching full:adde

2358   case ISD::ADDE: {
2383     // With ADDE, a carry bit may be added in, so we can only use this
2387     if (KnownZeroLow >= 2) // ADDE
3876     case ISD::ADDE:

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