Lines Matching refs:Op
125 for (SDValue Op : Ops) {
126 Entry.Node = Op;
128 Entry.isSExt = shouldSignExtendTypeInLibCall(Op.getValueType(), isSigned);
129 Entry.isZExt = !shouldSignExtendTypeInLibCall(Op.getValueType(), isSigned);
340 bool TargetLowering::TargetLoweringOpt::ShrinkDemandedConstant(SDValue Op,
342 SDLoc dl(Op);
345 switch (Op.getOpcode()) {
350 ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1));
353 if (Op.getOpcode() == ISD::XOR &&
359 EVT VT = Op.getValueType();
360 SDValue New = DAG.getNode(Op.getOpcode(), dl, VT, Op.getOperand(0),
364 return CombineTo(Op, New);
377 bool TargetLowering::TargetLoweringOpt::ShrinkDemandedOp(SDValue Op,
381 assert(Op.getNumOperands() == 2 &&
383 assert(Op.getNode()->getNumValues() == 1 &&
387 if (Op.getValueType().isVector())
392 if (!Op.getNode()->hasOneUse())
396 // Op's type. For expedience, just check power-of-2 integer types.
404 if (TLI.isTruncateFree(Op.getValueType(), SmallVT) &&
405 TLI.isZExtFree(SmallVT, Op.getValueType())) {
407 Op.getOpcode(), dl, SmallVT,
409 Op.getNode()->getOperand(0)),
411 Op.getNode()->getOperand(1)));
414 dl, Op.getValueType(), X);
415 return CombineTo(Op, Z);
421 /// Look at Op. At this point, we know that only the DemandedMask bits of the
422 /// result of Op are ever used downstream. If we can use this information to
423 /// simplify Op, create a new simplified DAG node and return true, returning the
428 bool TargetLowering::SimplifyDemandedBits(SDValue Op,
435 assert(Op.getValueType().getScalarType().getSizeInBits() == BitWidth &&
438 SDLoc dl(Op);
445 if (!Op.getNode()->hasOneUse()) {
449 TLO.DAG.computeKnownBits(Op, KnownZero, KnownOne, Depth);
456 // Not demanding any bits from Op.
457 if (!Op.isUndef())
458 return TLO.CombineTo(Op, TLO.DAG.getUNDEF(Op.getValueType()));
465 switch (Op.getOpcode()) {
468 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue();
476 if (ConstantSDNode *RHSC = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
479 TLO.DAG.computeKnownBits(Op.getOperand(0), LHSZero, LHSOne, Depth);
482 return TLO.CombineTo(Op, Op.getOperand(0));
485 if (TLO.ShrinkDemandedConstant(Op, ~LHSZero & NewMask))
489 if (SimplifyDemandedBits(Op.getOperand(1), NewMask, KnownZero,
493 if (SimplifyDemandedBits(Op.getOperand(0), ~KnownZero & NewMask,
501 return TLO.CombineTo(Op, Op.getOperand(0));
503 return TLO.CombineTo(Op, Op.getOperand(1));
506 return TLO.CombineTo(Op, TLO.DAG.getConstant(0, dl, Op.getValueType()));
508 if (TLO.ShrinkDemandedConstant(Op, ~KnownZero2 & NewMask))
511 if (TLO.ShrinkDemandedOp(Op, BitWidth, NewMask, dl))
520 if (SimplifyDemandedBits(Op.getOperand(1), NewMask, KnownZero,
524 if (SimplifyDemandedBits(Op.getOperand(0), ~KnownOne & NewMask,
532 return TLO.CombineTo(Op, Op.getOperand(0));
534 return TLO.CombineTo(Op, Op.getOperand(1));
538 return TLO.CombineTo(Op, Op.getOperand(0));
540 return TLO.CombineTo(Op, Op.getOperand(1));
542 if (TLO.ShrinkDemandedConstant(Op, NewMask))
545 if (TLO.ShrinkDemandedOp(Op, BitWidth, NewMask, dl))
554 if (SimplifyDemandedBits(Op.getOperand(1), NewMask, KnownZero,
558 if (SimplifyDemandedBits(Op.getOperand(0), NewMask, KnownZero2,
566 return TLO.CombineTo(Op, Op.getOperand(0));
568 return TLO.CombineTo(Op, Op.getOperand(1));
570 if (TLO.ShrinkDemandedOp(Op, BitWidth, NewMask, dl))
577 return TLO.CombineTo(Op, TLO.DAG.getNode(ISD::OR, dl, Op.getValueType(),
578 Op.getOperand(0),
579 Op.getOperand(1)));
593 EVT VT = Op.getValueType();
595 return TLO.CombineTo(Op, TLO.DAG.getNode(ISD::AND, dl, VT,
596 Op.getOperand(0), ANDC));
603 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
608 EVT VT = Op.getValueType();
609 SDValue New = TLO.DAG.getNode(Op.getOpcode(), dl,VT, Op.getOperand(0),
611 return TLO.CombineTo(Op, New);
615 } else if (TLO.ShrinkDemandedConstant(Op, NewMask)) {
624 if (SimplifyDemandedBits(Op.getOperand(2), NewMask, KnownZero,
627 if (SimplifyDemandedBits(Op.getOperand(1), NewMask, KnownZero2,
634 if (TLO.ShrinkDemandedConstant(Op, NewMask))
642 if (SimplifyDemandedBits(Op.getOperand(3), NewMask, KnownZero,
645 if (SimplifyDemandedBits(Op.getOperand(2), NewMask, KnownZero2,
652 if (TLO.ShrinkDemandedConstant(Op, NewMask))
660 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
662 SDValue InOp = Op.getOperand(0);
683 TLO.DAG.getConstant(Diff, dl, Op.getOperand(1).getValueType());
684 EVT VT = Op.getValueType();
685 return TLO.CombineTo(Op, TLO.DAG.getNode(Opc, dl, VT,
709 TLO.CombineTo(Op,
710 TLO.DAG.getNode(ISD::ANY_EXTEND, dl, Op.getValueType(),
730 Op.getOperand(1).getValueType());
731 EVT VT = Op.getValueType();
734 return TLO.CombineTo(Op, TLO.DAG.getNode(ISD::SHL, dl, VT,
747 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
748 EVT VT = Op.getValueType();
751 SDValue InOp = Op.getOperand(0);
761 if (cast<BinaryWithFlagsSDNode>(Op)->Flags.hasExact())
779 TLO.DAG.getConstant(Diff, dl, Op.getOperand(1).getValueType());
780 return TLO.CombineTo(Op, TLO.DAG.getNode(Opc, dl, VT,
803 return TLO.CombineTo(Op,
804 TLO.DAG.getNode(ISD::SRL, dl, Op.getValueType(),
805 Op.getOperand(0), Op.getOperand(1)));
807 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
808 EVT VT = Op.getValueType();
819 if (cast<BinaryWithFlagsSDNode>(Op)->Flags.hasExact())
828 if (SimplifyDemandedBits(Op.getOperand(0), InDemandedMask,
842 Flags.setExact(cast<BinaryWithFlagsSDNode>(Op)->Flags.hasExact());
843 return TLO.CombineTo(Op,
844 TLO.DAG.getNode(ISD::SRL, dl, VT, Op.getOperand(0),
845 Op.getOperand(1), &Flags));
853 Op.getOperand(1).getValueType());
854 return TLO.CombineTo(Op, TLO.DAG.getNode(ISD::SRL, dl, VT,
855 Op.getOperand(0), NewSA));
864 EVT ExVT = cast<VTSDNode>(Op.getOperand(1))->getVT();
870 SDValue InOp = Op.getOperand(0);
871 unsigned VTBits = Op->getValueType(0).getScalarType().getSizeInBits();
879 EVT ShiftAmtTy = Op.getValueType();
885 return TLO.CombineTo(Op, TLO.DAG.getNode(ISD::SHL, dl,
886 Op.getValueType(), InOp,
899 return TLO.CombineTo(Op, Op.getOperand(0));
912 if (SimplifyDemandedBits(Op.getOperand(0), InputDemandedBits,
922 return TLO.CombineTo(Op,
923 TLO.DAG.getZeroExtendInReg(Op.getOperand(0),dl,ExVT));
935 EVT HalfVT = Op.getOperand(0).getValueType();
944 if (SimplifyDemandedBits(Op.getOperand(0), MaskLo, KnownZeroLo,
948 if (SimplifyDemandedBits(Op.getOperand(1), MaskHi, KnownZeroHi,
961 Op.getOperand(0).getValueType().getScalarType().getSizeInBits();
968 return TLO.CombineTo(Op, TLO.DAG.getNode(ISD::ANY_EXTEND, dl,
969 Op.getValueType(),
970 Op.getOperand(0)));
972 if (SimplifyDemandedBits(Op.getOperand(0), InMask,
982 EVT InVT = Op.getOperand(0).getValueType();
990 return TLO.CombineTo(Op,TLO.DAG.getNode(ISD::ANY_EXTEND, dl,
991 Op.getValueType(),
992 Op.getOperand(0)));
1000 if (SimplifyDemandedBits(Op.getOperand(0), InDemandedBits, KnownZero,
1008 return TLO.CombineTo(Op, TLO.DAG.getNode(ISD::ZERO_EXTEND, dl,
1009 Op.getValueType(),
1010 Op.getOperand(0)));
1024 Op.getOperand(0).getValueType().getScalarType().getSizeInBits();
1026 if (SimplifyDemandedBits(Op.getOperand(0), InMask,
1038 Op.getOperand(0).getValueType().getScalarType().getSizeInBits();
1040 if (SimplifyDemandedBits(Op.getOperand(0), TruncMask,
1048 if (Op.getOperand(0).getNode()->hasOneUse()) {
1049 SDValue In = Op.getOperand(0);
1056 !isTypeDesirableForOp(ISD::SRL, Op.getValueType()))
1067 getShiftAmountTy(Op.getValueType(), DL));
1078 Op.getValueType(),
1080 return TLO.CombineTo(Op, TLO.DAG.getNode(ISD::SRL, dl,
1081 Op.getValueType(),
1095 EVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1098 if (SimplifyDemandedBits(Op.getOperand(0), ~InMask | NewMask,
1110 !Op.getValueType().isVector() &&
1111 !Op.getOperand(0).getValueType().isVector() &&
1112 NewMask == APInt::getSignBit(Op.getValueType().getSizeInBits()) &&
1113 Op.getOperand(0).getValueType().isFloatingPoint()) {
1114 bool OpVTLegal = isOperationLegalOrCustom(ISD::FGETSIGN, Op.getValueType());
1116 if ((OpVTLegal || i32Legal) && Op.getValueType().isSimple() &&
1117 Op.getOperand(0).getValueType() != MVT::f128) {
1119 EVT Ty = OpVTLegal ? Op.getValueType() : MVT::i32;
1122 SDValue Sign = TLO.DAG.getNode(ISD::FGETSIGN, dl, Ty, Op.getOperand(0));
1123 unsigned OpVTSizeInBits = Op.getValueType().getSizeInBits();
1125 Sign = TLO.DAG.getNode(ISD::ZERO_EXTEND, dl, Op.getValueType(), Sign);
1126 unsigned ShVal = Op.getValueType().getSizeInBits()-1;
1127 SDValue ShAmt = TLO.DAG.getConstant(ShVal, dl, Op.getValueType());
1128 return TLO.CombineTo(Op, TLO.DAG.getNode(ISD::SHL, dl,
1129 Op.getValueType(),
1141 if (SimplifyDemandedBits(Op.getOperand(0), LoMask, KnownZero2,
1144 if (SimplifyDemandedBits(Op.getOperand(1), LoMask, KnownZero2,
1148 if (TLO.ShrinkDemandedOp(Op, BitWidth, NewMask, dl))
1154 TLO.DAG.computeKnownBits(Op, KnownZero, KnownOne, Depth);
1162 const SDNode *N = Op.getNode();
1165 SDNode *Op = *I;
1166 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op))
1170 return TLO.CombineTo(Op,
1171 TLO.DAG.getConstant(KnownOne, dl, Op.getValueType()));
1179 void TargetLowering::computeKnownBitsForTargetNode(const SDValue Op,
1184 assert((Op.getOpcode() >= ISD::BUILTIN_OP_END ||
1185 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN ||
1186 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN ||
1187 Op.getOpcode() == ISD::INTRINSIC_VOID) &&
1188 "Should use MaskedValueIsZero if you don't know whether Op"
1195 unsigned TargetLowering::ComputeNumSignBitsForTargetNode(SDValue Op,
1198 assert((Op.getOpcode() >= ISD::BUILTIN_OP_END ||
1199 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN ||
1200 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN ||
1201 Op.getOpcode() == ISD::INTRINSIC_VOID) &&
1202 "Should use ComputeNumSignBits if you don't know whether Op"
2017 // If X op Y == Y op X, try other combinations.
2275 void TargetLowering::LowerAsmOperandForConstraint(SDValue Op,
2286 if (Op.getOpcode() == ISD::BasicBlock) {
2287 Ops.push_back(Op);
2297 ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op);
2298 GlobalAddressSDNode *GA = dyn_cast<GlobalAddressSDNode>(Op);
2301 if (Op.getOpcode() == ISD::ADD) {
2302 C = dyn_cast<ConstantSDNode>(Op.getOperand(1));
2303 GA = dyn_cast<GlobalAddressSDNode>(Op.getOperand(0));
2305 C = dyn_cast<ConstantSDNode>(Op.getOperand(0));
2306 GA = dyn_cast<GlobalAddressSDNode>(Op.getOperand(1));
2322 Op.getValueType(), Offs));
2704 SDValue Op, SelectionDAG *DAG) {
2719 if (CType == TargetLowering::C_Other && Op.getNode()) {
2723 TLI.LowerAsmOperandForConstraint(Op, OpInfo.Codes[i],
2753 SDValue Op,
2762 ChooseConstraint(OpInfo, *this, Op, DAG);
2966 verifyReturnAddressArgumentIsConstant(SDValue Op, SelectionDAG &DAG) const {
2967 if (!isa<ConstantSDNode>(Op.getOperand(0))) {
