Lines Matching refs:Addend
34 /// Extract the addend encoded in the instruction / memory location.
39 int64_t Addend = 0;
64 Addend = *reinterpret_cast<support::ulittle32_t *>(LocalAddress);
66 Addend = *reinterpret_cast<support::ulittle64_t *>(LocalAddress);
73 // Get the 26 bit addend encoded in the branch instruction and sign-extend
76 Addend = (*p & 0x03FFFFFF) << 2;
77 Addend = SignExtend64(Addend, 28);
86 // Get the 21 bit addend encoded in the adrp instruction and sign-extend
89 Addend = ((*p & 0x60000000) >> 29) | ((*p & 0x01FFFFE0) >> 3) << 12;
90 Addend = SignExtend64(Addend, 33);
109 // Get the 12 bit addend encoded in the instruction.
110 Addend = (*p & 0x003FFC00) >> 10;
125 Addend <<= ImplicitShift;
129 return Addend;
132 /// Extract the addend encoded in the instruction.
134 MachO::RelocationInfoType RelType, int64_t Addend) const {
159 *reinterpret_cast<support::ulittle32_t *>(LocalAddress) = Addend;
161 *reinterpret_cast<support::ulittle64_t *>(LocalAddress) = Addend;
168 // Verify addend value.
169 assert((Addend & 0x3) == 0 && "Branch target is not aligned");
170 assert(isInt<28>(Addend) && "Branch target is out of range.");
172 // Encode the addend as 26 bit immediate in the branch instruction.
173 *p = (*p & 0xFC000000) | ((uint32_t)(Addend >> 2) & 0x03FFFFFF);
182 // Check that the addend fits into 21 bits (+ 12 lower bits).
183 assert((Addend & 0xFFF) == 0 && "ADRP target is not page aligned.");
184 assert(isInt<33>(Addend) && "Invalid page reloc value.");
186 // Encode the addend into the instruction.
187 uint32_t ImmLoValue = ((uint64_t)Addend << 17) & 0x60000000;
188 uint32_t ImmHiValue = ((uint64_t)Addend >> 9) & 0x00FFFFE0;
219 assert(((Addend & 0xF) == 0) &&
224 assert(((Addend & 0x1) == 0) && "16-bit LDR/STR not 2-byte aligned.");
227 assert(((Addend & 0x3) == 0) && "32-bit LDR/STR not 4-byte aligned.");
230 assert(((Addend & 0x7) == 0) && "64-bit LDR/STR not 8-byte aligned.");
235 Addend >>= ImplicitShift;
236 assert(isUInt<12>(Addend) && "Addend cannot be encoded.");
238 // Encode the addend into the instruction.
239 *p = (*p & 0xFFC003FF) | ((uint32_t)(Addend << 10) & 0x003FFC00);
260 // addend for the following relocation. If found: (1) store the associated
261 // addend, (2) consume the next relocation, and (3) use the stored addend to
262 // override the addend.
279 RE.Addend = decodeAddend(RE);
281 assert((ExplicitAddend == 0 || RE.Addend == 0) && "Relocation has "\
282 "ARM64_RELOC_ADDEND and embedded addend in the instruction.");
284 RE.Addend = ExplicitAddend;
296 RE.Addend = Value.Offset;
329 encodeAddend(LocalAddress, 1 << RE.Size, RelType, Value + RE.Addend);
336 int64_t PCRelVal = Value - FinalAddress + RE.Addend;
346 ((Value + RE.Addend) & (-4096)) - (FinalAddress & (-4096));
354 Value += RE.Addend;
365 Value = SectionABase - SectionBBase + RE.Addend;
440 int64_t Addend =
451 RelocationEntry R(SectionID, Offset, MachO::ARM64_RELOC_SUBTRACTOR, (uint64_t)Addend,
