Lines Matching refs:GPR64RegClass
343 const TargetRegisterClass *RC = (VT == MVT::i64) ? &AArch64::GPR64RegClass
377 &AArch64::GPR64RegClass : &AArch64::GPR32RegClass;
435 ResultReg = createResultReg(&AArch64::GPR64RegClass);
1253 Is64Bit ? &AArch64::GPR64RegClass : &AArch64::GPR32RegClass;
1296 RC = Is64Bit ? &AArch64::GPR64RegClass : &AArch64::GPR32RegClass;
1338 Is64Bit ? &AArch64::GPR64RegClass : &AArch64::GPR32RegClass;
1379 RC = Is64Bit ? &AArch64::GPR64RegClass : &AArch64::GPR32RegClass;
1680 RC = &AArch64::GPR64RegClass;
1782 &AArch64::GPR64RegClass: &AArch64::GPR32RegClass;
1787 &AArch64::GPR64RegClass: &AArch64::GPR32RegClass;
1792 &AArch64::GPR64RegClass: &AArch64::GPR32RegClass;
1796 RC = &AArch64::GPR64RegClass;
1824 unsigned Reg64 = createResultReg(&AArch64::GPR64RegClass);
2598 RC = &AArch64::GPR64RegClass;
2767 DestVT == MVT::i32 ? &AArch64::GPR32RegClass : &AArch64::GPR64RegClass);
2898 RC = &AArch64::GPR64RegClass;
3143 CallReg = createResultReg(&AArch64::GPR64RegClass);
3337 unsigned SrcReg = MRI.createVirtualRegister(&AArch64::GPR64RegClass);
3348 DestReg = fastEmitInst_ri(AArch64::LDRXui, &AArch64::GPR64RegClass,
3845 unsigned Reg64 = MRI.createVirtualRegister(&AArch64::GPR64RegClass);
3879 (RetVT == MVT::i64) ? &AArch64::GPR64RegClass : &AArch64::GPR32RegClass;
3889 return fastEmitInst_rrr(AArch64::SMADDLrrr, &AArch64::GPR64RegClass,
3899 return fastEmitInst_rrr(AArch64::UMADDLrrr, &AArch64::GPR64RegClass,
3918 (RetVT == MVT::i64) ? &AArch64::GPR64RegClass : &AArch64::GPR32RegClass;
3946 Is64Bit ? &AArch64::GPR64RegClass : &AArch64::GPR32RegClass;
4024 (RetVT == MVT::i64) ? &AArch64::GPR64RegClass : &AArch64::GPR32RegClass;
4053 Is64Bit ? &AArch64::GPR64RegClass : &AArch64::GPR32RegClass;
4145 (RetVT == MVT::i64) ? &AArch64::GPR64RegClass : &AArch64::GPR32RegClass;
4174 Is64Bit ? &AArch64::GPR64RegClass : &AArch64::GPR32RegClass;
4287 unsigned Src64 = MRI.createVirtualRegister(&AArch64::GPR64RegClass);
4297 (DestVT == MVT::i64) ? &AArch64::GPR64RegClass : &AArch64::GPR32RegClass;
4384 unsigned Reg64 = createResultReg(&AArch64::GPR64RegClass);
4427 unsigned ResultReg = createResultReg(&AArch64::GPR64RegClass);
4489 (DestVT == MVT::i64) ? &AArch64::GPR64RegClass : &AArch64::GPR32RegClass;
4688 case MVT::i64: RC = &AArch64::GPR64RegClass; break;
4783 RC = &AArch64::GPR64RegClass;
