Lines Matching refs:Chan
125 for (unsigned Chan = 0; Chan < 4; ++Chan) {
128 if (Chan < 2)
129 DstReg = MI.getOperand(Chan).getReg();
131 DstReg = Chan == 2 ? AMDGPU::T0_Z : AMDGPU::T0_W;
134 DstReg, MI.getOperand(3 + (Chan % 2)).getReg(), PReg);
136 if (Chan > 0) {
139 if (Chan >= 2)
141 if (Chan != 3)
154 for (unsigned Chan = 0; Chan < 4; ++Chan) {
157 if (Chan < 2)
158 DstReg = Chan == 0 ? AMDGPU::T0_X : AMDGPU::T0_Y;
160 DstReg = MI.getOperand(Chan-2).getReg();
163 DstReg, MI.getOperand(3 + (Chan % 2)).getReg(), PReg);
165 if (Chan > 0) {
168 if (Chan < 2)
170 if (Chan != 3)
185 for (unsigned Chan = 0; Chan < 4; ++Chan) {
187 TRI.getSubReg(DstReg, TRI.getSubRegFromChannel(Chan)), PReg);
188 if (Chan > 0) {
191 if (Chan != 3)
205 for (unsigned Chan = 0; Chan < 4; ++Chan) {
206 bool Mask = (Chan != TRI.getHWRegChan(DstReg));
208 AMDGPU::R600_TReg32RegClass.getRegister((DstBase * 4) + Chan);
210 TII->buildSlotOfVectorInstruction(MBB, &MI, Chan, SubDstReg);
211 if (Chan > 0) {
217 if (Chan != 3)
271 for (unsigned Chan = 0; Chan < 4; Chan++) {
286 unsigned SubRegIndex = TRI.getSubRegFromChannel(Chan);
291 unsigned SubRegIndex0 = TRI.getSubRegFromChannel(CubeSrcSwz[Chan]);
292 unsigned SubRegIndex1 = TRI.getSubRegFromChannel(CubeSrcSwz[3 - Chan]);
301 unsigned SubRegIndex = TRI.getSubRegFromChannel(Chan);
306 Mask = (Chan != TRI.getHWRegChan(DstReg));
308 DstReg = AMDGPU::R600_TReg32RegClass.getRegister((DstBase * 4) + Chan);
312 NotLast = (Chan != 3 );
330 if (Chan != 0)
