Cross Reference: /external/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp

Lines Matching defs:UseMCID
2663   const MCInstrDesc &UseMCID = UseMI.getDesc();
2664   if (UseMCID.hasOptionalDef()) {
2665     unsigned NumOps = UseMCID.getNumOperands();
3261                                   const MCInstrDesc &UseMCID,
3264   int RegNo = (int)(UseIdx+1) - UseMCID.getNumOperands() + 1;
3278     switch (UseMCID.getOpcode()) {
3301                                  const MCInstrDesc &UseMCID,
3304   int RegNo = (int)(UseIdx+1) - UseMCID.getNumOperands() + 1;
3332                                     const MCInstrDesc &UseMCID,
3335   unsigned UseClass = UseMCID.getSchedClass();
3337   if (DefIdx < DefMCID.getNumDefs() && UseIdx < UseMCID.getNumOperands())
3386   switch (UseMCID.getOpcode()) {
3397     UseCycle = getVSTMUseCycle(ItinData, UseMCID, UseClass, UseIdx, UseAlign);
3415     UseCycle = getSTMUseCycle(ItinData, UseMCID, UseClass, UseIdx, UseAlign);
3713     unsigned UseIdx, const MCInstrDesc &UseMCID, unsigned UseAdj) const {
3751   int Latency = getOperandLatency(ItinData, DefMCID, DefIdx, DefAlign, UseMCID,
3791   const MCInstrDesc &UseMCID = get(UseNode->getMachineOpcode());
3799                                   UseMCID, UseIdx, UseAlign);
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